[FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (#108024)
Originally I tried spliting these features in the compiler with https://github.com/llvm/llvm-project/pull/101712, but we decided to lump those features in the ACLE specification (see https://github.com/ARM-software/acle/pull/346). Since there are no hardware implementations out there which implement ls64 without ls64_v or ls64_accdata, this shouldn't be a regression for feature detection.
This commit is contained in:
Alexandros Lamprineas
committed by
GitHub
GitHub
parent
ebf1308674
commit
d497f465df
@@ -26,8 +26,8 @@
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// CHECK-NEXT: br label [[RETURN]]
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// CHECK: if.end2:
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// CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
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// CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 166633186212708352
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// CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 166633186212708352
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// CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 171136785840078848
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// CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 171136785840078848
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// CHECK-NEXT: [[TMP11:%.*]] = and i1 true, [[TMP10]]
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// CHECK-NEXT: br i1 [[TMP11]], label [[IF_THEN3:%.*]], label [[IF_END4:%.*]]
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// CHECK: if.then3:
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@@ -52,7 +52,7 @@ int main(void) {
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if (__builtin_cpu_supports("sve2-pmull128+memtag"))
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return 2;
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if (__builtin_cpu_supports("sme2+ls64_v+wfxt"))
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if (__builtin_cpu_supports("sme2+ls64+wfxt"))
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return 3;
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if (__builtin_cpu_supports("avx2"))
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@@ -66,15 +66,9 @@ __attribute__((target_version("i8mm"))) int fmv(void) { return 0; }
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// CHECK: define dso_local i32 @fmv._Mjscvt() #[[jscvt:[0-9]+]] {
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__attribute__((target_version("jscvt"))) int fmv(void) { return 0; }
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// CHECK: define dso_local i32 @fmv._Mls64() #[[ATTR0:[0-9]+]] {
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// CHECK: define dso_local i32 @fmv._Mls64() #[[ls64:[0-9]+]] {
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__attribute__((target_version("ls64"))) int fmv(void) { return 0; }
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// CHECK: define dso_local i32 @fmv._Mls64_accdata() #[[ls64_accdata:[0-9]+]] {
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__attribute__((target_version("ls64_accdata"))) int fmv(void) { return 0; }
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// CHECK: define dso_local i32 @fmv._Mls64_v() #[[ATTR0:[0-9]+]] {
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__attribute__((target_version("ls64_v"))) int fmv(void) { return 0; }
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// CHECK: define dso_local i32 @fmv._Mlse() #[[lse:[0-9]+]] {
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__attribute__((target_version("lse"))) int fmv(void) { return 0; }
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@@ -210,7 +204,7 @@ int caller() {
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// CHECK: attributes #[[frintts]] = { {{.*}} "target-features"="+fp-armv8,+fptoint,+neon,+outline-atomics,+v8a"
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// CHECK: attributes #[[i8mm]] = { {{.*}} "target-features"="+fp-armv8,+i8mm,+neon,+outline-atomics,+v8a"
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// CHECK: attributes #[[jscvt]] = { {{.*}} "target-features"="+fp-armv8,+jsconv,+neon,+outline-atomics,+v8a"
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// CHECK: attributes #[[ls64_accdata]] = { {{.*}} "target-features"="+fp-armv8,+ls64,+neon,+outline-atomics,+v8a"
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// CHECK: attributes #[[ls64]] = { {{.*}} "target-features"="+fp-armv8,+ls64,+neon,+outline-atomics,+v8a"
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// CHECK: attributes #[[lse]] = { {{.*}} "target-features"="+fp-armv8,+lse,+neon,+outline-atomics,+v8a"
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// CHECK: attributes #[[memtag2]] = { {{.*}} "target-features"="+fp-armv8,+mte,+neon,+outline-atomics,+v8a"
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// CHECK: attributes #[[mops]] = { {{.*}} "target-features"="+fp-armv8,+mops,+neon,+outline-atomics,+v8a"
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@@ -5,10 +5,10 @@
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int __attribute__((target_version("rng+flagm+fp16fml"))) fmv(void) { return 1; }
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int __attribute__((target_version("flagm2+sme-i16i64"))) fmv(void) { return 2; }
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int __attribute__((target_version("lse+sha2"))) fmv(void) { return 3; }
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int __attribute__((target_version("dotprod+ls64_accdata"))) fmv(void) { return 4; }
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int __attribute__((target_version("dotprod+ls64"))) fmv(void) { return 4; }
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int __attribute__((target_version("fp16fml+memtag"))) fmv(void) { return 5; }
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int __attribute__((target_version("fp+aes"))) fmv(void) { return 6; }
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int __attribute__((target_version("crc+ls64_v"))) fmv(void) { return 7; }
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int __attribute__((target_version("crc+ls64"))) fmv(void) { return 7; }
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int __attribute__((target_version("bti"))) fmv(void) { return 8; }
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int __attribute__((target_version("sme2"))) fmv(void) { return 9; }
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int __attribute__((target_version("default"))) fmv(void) { return 0; }
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@@ -171,7 +171,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv._MdotprodMls64_accdata
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// CHECK-LABEL: define {{[^@]+}}@fmv._MdotprodMls64
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// CHECK-SAME: () #[[ATTR3:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 4
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@@ -192,7 +192,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv._McrcMls64_v
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// CHECK-LABEL: define {{[^@]+}}@fmv._McrcMls64
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// CHECK-SAME: () #[[ATTR6:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 7
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@@ -221,14 +221,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_one._Mls64Msimd
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// CHECK-SAME: () #[[ATTR5]] {
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// CHECK-SAME: () #[[ATTR10:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 1
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_one._Mdpb
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// CHECK-SAME: () #[[ATTR10:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR11:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 2
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//
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@@ -263,7 +263,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_two._Mfp16Msimd
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// CHECK-SAME: () #[[ATTR11:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR12:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 4
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//
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@@ -354,14 +354,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@unused_with_forward_default_decl._Mmops
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// CHECK-SAME: () #[[ATTR13:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR14:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 0
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@unused_with_implicit_extern_forward_default_decl._Mdotprod
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// CHECK-SAME: () #[[ATTR14:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR15:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 0
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//
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@@ -375,7 +375,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@unused_with_default_def._Msve
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// CHECK-SAME: () #[[ATTR15:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR16:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 0
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//
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@@ -389,7 +389,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@unused_with_implicit_default_def._Mfp16
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// CHECK-SAME: () #[[ATTR11]] {
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// CHECK-SAME: () #[[ATTR12]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 0
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//
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@@ -410,14 +410,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@unused_with_implicit_forward_default_def._Mlse
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// CHECK-SAME: () #[[ATTR16:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR17:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 1
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@unused_without_default._Mrdm
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// CHECK-SAME: () #[[ATTR17:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR18:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 0
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//
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@@ -431,14 +431,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@used_def_without_default_decl._Mjscvt
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// CHECK-SAME: () #[[ATTR19:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR20:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 1
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@used_def_without_default_decl._Mrdm
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// CHECK-SAME: () #[[ATTR17]] {
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// CHECK-SAME: () #[[ATTR18]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 2
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//
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@@ -489,15 +489,15 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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// CHECK-NEXT: [[TMP11:%.*]] = and i1 true, [[TMP10]]
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// CHECK-NEXT: br i1 [[TMP11]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]
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// CHECK: resolver_return3:
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// CHECK-NEXT: ret ptr @fmv._MdotprodMls64_accdata
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// CHECK-NEXT: ret ptr @fmv._MdotprodMls64
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// CHECK: resolver_else4:
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// CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
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// CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], 4503599627371520
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// CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP13]], 4503599627371520
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// CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], 9007199254742016
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// CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP13]], 9007199254742016
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// CHECK-NEXT: [[TMP15:%.*]] = and i1 true, [[TMP14]]
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// CHECK-NEXT: br i1 [[TMP15]], label [[RESOLVER_RETURN5:%.*]], label [[RESOLVER_ELSE6:%.*]]
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// CHECK: resolver_return5:
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// CHECK-NEXT: ret ptr @fmv._McrcMls64_v
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// CHECK-NEXT: ret ptr @fmv._McrcMls64
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// CHECK: resolver_else6:
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// CHECK-NEXT: [[TMP16:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
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// CHECK-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 8796093022216
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@@ -546,8 +546,8 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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// CHECK-NEXT: resolver_entry:
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// CHECK-NEXT: call void @__init_cpu_features_resolver()
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// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
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// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 2251799813685760
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// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 2251799813685760
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// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 9007199254741504
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// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 9007199254741504
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// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
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// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]
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// CHECK: resolver_return:
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@@ -606,8 +606,8 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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// CHECK-NEXT: resolver_entry:
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// CHECK-NEXT: call void @__init_cpu_features_resolver()
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// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
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// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 2251799813685248
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// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 2251799813685248
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// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 9007199254740992
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// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 9007199254740992
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// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
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// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]
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// CHECK: resolver_return:
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@@ -618,7 +618,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_d._Msb
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// CHECK-SAME: () #[[ATTR20:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR22:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 0
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//
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@@ -660,91 +660,91 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mf64mmMpmullMsha1
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// CHECK-SAME: () #[[ATTR21:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR23:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 1
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16MrdmMsme
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// CHECK-SAME: () #[[ATTR22:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR24:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 2
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mf32mmMi8mmMsha3
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// CHECK-SAME: () #[[ATTR23:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR25:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 12
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MditMsve-ebf16
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// CHECK-SAME: () #[[ATTR24:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR26:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 8
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MdpbMrcpc2
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// CHECK-SAME: () #[[ATTR25:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR27:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 6
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mdpb2Mjscvt
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// CHECK-SAME: () #[[ATTR26:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR28:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 7
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfrinttsMrcpc
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// CHECK-SAME: () #[[ATTR27:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR29:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 3
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MsveMsve-bf16
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// CHECK-SAME: () #[[ATTR28:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR30:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 4
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Msve2-aesMsve2-sha3
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// CHECK-SAME: () #[[ATTR29:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR31:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 5
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Msve2Msve2-bitpermMsve2-pmull128
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// CHECK-SAME: () #[[ATTR30:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR32:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 9
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||||
//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mmemtag2Msve2-sm4
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// CHECK-SAME: () #[[ATTR31:[0-9]+]] {
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// CHECK-SAME: () #[[ATTR33:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 10
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||||
//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mmemtag3MmopsMrcpc3
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// CHECK-SAME: () #[[ATTR32:[0-9]+]] {
|
||||
// CHECK-SAME: () #[[ATTR34:[0-9]+]] {
|
||||
// CHECK-NEXT: entry:
|
||||
// CHECK-NEXT: ret i32 11
|
||||
//
|
||||
//
|
||||
// CHECK: Function Attrs: noinline nounwind optnone
|
||||
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MaesMdotprod
|
||||
// CHECK-SAME: () #[[ATTR14]] {
|
||||
// CHECK-SAME: () #[[ATTR15]] {
|
||||
// CHECK-NEXT: entry:
|
||||
// CHECK-NEXT: ret i32 13
|
||||
//
|
||||
@@ -758,14 +758,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
|
||||
//
|
||||
// CHECK: Function Attrs: noinline nounwind optnone
|
||||
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfpMsm4
|
||||
// CHECK-SAME: () #[[ATTR33:[0-9]+]] {
|
||||
// CHECK-SAME: () #[[ATTR35:[0-9]+]] {
|
||||
// CHECK-NEXT: entry:
|
||||
// CHECK-NEXT: ret i32 15
|
||||
//
|
||||
//
|
||||
// CHECK: Function Attrs: noinline nounwind optnone
|
||||
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
|
||||
// CHECK-SAME: () #[[ATTR34:[0-9]+]] {
|
||||
// CHECK-SAME: () #[[ATTR36:[0-9]+]] {
|
||||
// CHECK-NEXT: entry:
|
||||
// CHECK-NEXT: ret i32 16
|
||||
//
|
||||
@@ -1118,36 +1118,38 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
|
||||
// CHECK: attributes #[[ATTR3]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+dotprod,+fp-armv8,+ls64,+neon" }
|
||||
// CHECK: attributes #[[ATTR4]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fp16fml,+fullfp16,+neon" }
|
||||
// CHECK: attributes #[[ATTR5]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon" }
|
||||
// CHECK: attributes #[[ATTR6]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc" }
|
||||
// CHECK: attributes #[[ATTR6]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+ls64" }
|
||||
// CHECK: attributes #[[ATTR7]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bti" }
|
||||
// CHECK: attributes #[[ATTR8]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+sme,+sme2" }
|
||||
// CHECK: attributes #[[ATTR9]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
|
||||
// CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccpp" }
|
||||
// CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon" }
|
||||
// CHECK: attributes #[[ATTR12:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
|
||||
// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+mops" }
|
||||
// CHECK: attributes #[[ATTR14]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+dotprod,+fp-armv8,+neon" }
|
||||
// CHECK: attributes #[[ATTR15]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve" }
|
||||
// CHECK: attributes #[[ATTR16]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+lse" }
|
||||
// CHECK: attributes #[[ATTR17]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+rdm" }
|
||||
// CHECK: attributes #[[ATTR18:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+jsconv,+neon" }
|
||||
// CHECK: attributes #[[ATTR19]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+jsconv,+neon" }
|
||||
// CHECK: attributes #[[ATTR20]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+sb" }
|
||||
// CHECK: attributes #[[ATTR21]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+aes,+f64mm,+fp-armv8,+fullfp16,+neon,+sve" }
|
||||
// CHECK: attributes #[[ATTR22]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+complxnum,+fp-armv8,+fullfp16,+neon,+rdm,+sme" }
|
||||
// CHECK: attributes #[[ATTR23]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+f32mm,+fp-armv8,+fullfp16,+i8mm,+neon,+sha2,+sha3,+sve" }
|
||||
// CHECK: attributes #[[ATTR24]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+dit,+fp-armv8,+fullfp16,+neon,+sve" }
|
||||
// CHECK: attributes #[[ATTR25]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccpp,+rcpc" }
|
||||
// CHECK: attributes #[[ATTR26]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccdp,+ccpp,+fp-armv8,+jsconv,+neon" }
|
||||
// CHECK: attributes #[[ATTR27]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fptoint,+rcpc" }
|
||||
// CHECK: attributes #[[ATTR28]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fp-armv8,+fullfp16,+neon,+sve" }
|
||||
// CHECK: attributes #[[ATTR29]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve,+sve2,+sve2-aes,+sve2-sha3" }
|
||||
// CHECK: attributes #[[ATTR30]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve,+sve2,+sve2-aes,+sve2-bitperm" }
|
||||
// CHECK: attributes #[[ATTR31]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+mte,+neon,+sve,+sve2,+sve2-sm4" }
|
||||
// CHECK: attributes #[[ATTR32]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+mops,+mte,+rcpc,+rcpc3" }
|
||||
// CHECK: attributes #[[ATTR33]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+sm4" }
|
||||
// CHECK: attributes #[[ATTR34]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+lse,+neon,+rdm" }
|
||||
// CHECK: attributes #[[ATTR35:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+rdm" }
|
||||
// CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+ls64,+neon" }
|
||||
// CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccpp" }
|
||||
// CHECK: attributes #[[ATTR12]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon" }
|
||||
// CHECK: attributes #[[ATTR13:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
|
||||
// CHECK: attributes #[[ATTR14]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+mops" }
|
||||
// CHECK: attributes #[[ATTR15]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+dotprod,+fp-armv8,+neon" }
|
||||
// CHECK: attributes #[[ATTR16]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve" }
|
||||
// CHECK: attributes #[[ATTR17]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+lse" }
|
||||
// CHECK: attributes #[[ATTR18]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+rdm" }
|
||||
// CHECK: attributes #[[ATTR19:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+jsconv,+neon" }
|
||||
// CHECK: attributes #[[ATTR20]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+jsconv,+neon" }
|
||||
// CHECK: attributes #[[ATTR21:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ls64" }
|
||||
// CHECK: attributes #[[ATTR22]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+sb" }
|
||||
// CHECK: attributes #[[ATTR23]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+aes,+f64mm,+fp-armv8,+fullfp16,+neon,+sve" }
|
||||
// CHECK: attributes #[[ATTR24]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+complxnum,+fp-armv8,+fullfp16,+neon,+rdm,+sme" }
|
||||
// CHECK: attributes #[[ATTR25]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+f32mm,+fp-armv8,+fullfp16,+i8mm,+neon,+sha2,+sha3,+sve" }
|
||||
// CHECK: attributes #[[ATTR26]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+dit,+fp-armv8,+fullfp16,+neon,+sve" }
|
||||
// CHECK: attributes #[[ATTR27]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccpp,+rcpc" }
|
||||
// CHECK: attributes #[[ATTR28]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccdp,+ccpp,+fp-armv8,+jsconv,+neon" }
|
||||
// CHECK: attributes #[[ATTR29]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fptoint,+rcpc" }
|
||||
// CHECK: attributes #[[ATTR30]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fp-armv8,+fullfp16,+neon,+sve" }
|
||||
// CHECK: attributes #[[ATTR31]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve,+sve2,+sve2-aes,+sve2-sha3" }
|
||||
// CHECK: attributes #[[ATTR32]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve,+sve2,+sve2-aes,+sve2-bitperm" }
|
||||
// CHECK: attributes #[[ATTR33]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+mte,+neon,+sve,+sve2,+sve2-sm4" }
|
||||
// CHECK: attributes #[[ATTR34]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+mops,+mte,+rcpc,+rcpc3" }
|
||||
// CHECK: attributes #[[ATTR35]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+sm4" }
|
||||
// CHECK: attributes #[[ATTR36]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+lse,+neon,+rdm" }
|
||||
// CHECK: attributes #[[ATTR37:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+rdm" }
|
||||
//.
|
||||
// CHECK-NOFMV: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="-fmv" }
|
||||
// CHECK-NOFMV: attributes #[[ATTR1:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="-fmv" }
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals all --include-generated-funcs --version 5
|
||||
// RUN: %clang_cc1 -std=c++11 -triple aarch64-linux-gnu -emit-llvm %s -o - | FileCheck %s
|
||||
|
||||
int __attribute__((target_clones("ls64_v+fp16", "default"))) foo_ovl(int) { return 1; }
|
||||
int __attribute__((target_clones("ls64_accdata+ls64"))) foo_ovl(void) { return 2; }
|
||||
int __attribute__((target_clones("ls64+fp16", "default"))) foo_ovl(int) { return 1; }
|
||||
int __attribute__((target_clones("fp16+ls64"))) foo_ovl(void) { return 2; }
|
||||
|
||||
int bar() {
|
||||
return foo_ovl(1) + foo_ovl();
|
||||
@@ -45,7 +45,7 @@ void run_foo_tml() {
|
||||
// CHECK: @_ZN7MyClassIssE7foo_tmlEv = weak_odr ifunc i32 (ptr), ptr @_ZN7MyClassIssE7foo_tmlEv.resolver
|
||||
// CHECK: @_ZN7MyClassIisE7foo_tmlEv = weak_odr ifunc i32 (ptr), ptr @_ZN7MyClassIisE7foo_tmlEv.resolver
|
||||
//.
|
||||
// CHECK-LABEL: define dso_local noundef i32 @_Z7foo_ovli._Mfp16Mls64_v(
|
||||
// CHECK-LABEL: define dso_local noundef i32 @_Z7foo_ovli._Mfp16Mls64(
|
||||
// CHECK-SAME: i32 noundef [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
|
||||
@@ -57,18 +57,18 @@ void run_foo_tml() {
|
||||
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
|
||||
// CHECK-NEXT: call void @__init_cpu_features_resolver()
|
||||
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 4503599627436032
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4503599627436032
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 9007199254806528
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 9007199254806528
|
||||
// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
|
||||
// CHECK-NEXT: br i1 [[TMP3]], label %[[RESOLVER_RETURN:.*]], label %[[RESOLVER_ELSE:.*]]
|
||||
// CHECK: [[RESOLVER_RETURN]]:
|
||||
// CHECK-NEXT: ret ptr @_Z7foo_ovli._Mfp16Mls64_v
|
||||
// CHECK-NEXT: ret ptr @_Z7foo_ovli._Mfp16Mls64
|
||||
// CHECK: [[RESOLVER_ELSE]]:
|
||||
// CHECK-NEXT: ret ptr @_Z7foo_ovli.default
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define dso_local noundef i32 @_Z7foo_ovlv._Mls64Mls64_accdata(
|
||||
// CHECK-SAME: ) #[[ATTR1:[0-9]+]] {
|
||||
// CHECK-LABEL: define dso_local noundef i32 @_Z7foo_ovlv._Mfp16Mls64(
|
||||
// CHECK-SAME: ) #[[ATTR0]] {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: ret i32 2
|
||||
//
|
||||
@@ -77,18 +77,18 @@ void run_foo_tml() {
|
||||
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
|
||||
// CHECK-NEXT: call void @__init_cpu_features_resolver()
|
||||
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 11258999068426240
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 11258999068426240
|
||||
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 9007199254806528
|
||||
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 9007199254806528
|
||||
// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
|
||||
// CHECK-NEXT: br i1 [[TMP3]], label %[[RESOLVER_RETURN:.*]], label %[[RESOLVER_ELSE:.*]]
|
||||
// CHECK: [[RESOLVER_RETURN]]:
|
||||
// CHECK-NEXT: ret ptr @_Z7foo_ovlv._Mls64Mls64_accdata
|
||||
// CHECK-NEXT: ret ptr @_Z7foo_ovlv._Mfp16Mls64
|
||||
// CHECK: [[RESOLVER_ELSE]]:
|
||||
// CHECK-NEXT: ret ptr @_Z7foo_ovlv.default
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define dso_local noundef i32 @_Z3barv(
|
||||
// CHECK-SAME: ) #[[ATTR2:[0-9]+]] {
|
||||
// CHECK-SAME: ) #[[ATTR1:[0-9]+]] {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_Z7foo_ovli(i32 noundef 1)
|
||||
// CHECK-NEXT: [[CALL1:%.*]] = call noundef i32 @_Z7foo_ovlv()
|
||||
@@ -97,7 +97,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define dso_local void @_Z11run_foo_tmlv(
|
||||
// CHECK-SAME: ) #[[ATTR2]] {
|
||||
// CHECK-SAME: ) #[[ATTR1]] {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[MC1:%.*]] = alloca [[STRUCT_MYCLASS:%.*]], align 1
|
||||
// CHECK-NEXT: [[MC2:%.*]] = alloca [[STRUCT_MYCLASS_0:%.*]], align 1
|
||||
@@ -111,7 +111,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define linkonce_odr noundef i32 @_ZN7MyClassIfsE7foo_tmlEv(
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR1]] comdat {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
@@ -120,7 +120,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define linkonce_odr noundef i32 @_ZN7MyClassIdfE7foo_tmlEv(
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR1]] comdat {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
@@ -129,7 +129,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define dso_local noundef i32 @_Z7foo_ovli.default(
|
||||
// CHECK-SAME: i32 noundef [[TMP0:%.*]]) #[[ATTR2]] {
|
||||
// CHECK-SAME: i32 noundef [[TMP0:%.*]]) #[[ATTR1]] {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
|
||||
// CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4
|
||||
@@ -137,13 +137,13 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define dso_local noundef i32 @_Z7foo_ovlv.default(
|
||||
// CHECK-SAME: ) #[[ATTR2]] {
|
||||
// CHECK-SAME: ) #[[ATTR1]] {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: ret i32 2
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define linkonce_odr noundef i32 @_ZN7MyClassIssE7foo_tmlEv._Mfrintts(
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR3:[0-9]+]] comdat {
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
@@ -152,7 +152,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define linkonce_odr noundef i32 @_ZN7MyClassIssE7foo_tmlEv._Msme-f64f64Mssbs(
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR4:[0-9]+]] comdat {
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR3:[0-9]+]] comdat {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
@@ -161,7 +161,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define linkonce_odr noundef i32 @_ZN7MyClassIssE7foo_tmlEv.default(
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR1]] comdat {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
@@ -192,7 +192,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define linkonce_odr noundef i32 @_ZN7MyClassIisE7foo_tmlEv._Mfrintts(
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR3]] comdat {
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
@@ -201,7 +201,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define linkonce_odr noundef i32 @_ZN7MyClassIisE7foo_tmlEv._Msme-f64f64Mssbs(
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR4]] comdat {
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR3]] comdat {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
@@ -210,7 +210,7 @@ void run_foo_tml() {
|
||||
//
|
||||
//
|
||||
// CHECK-LABEL: define linkonce_odr noundef i32 @_ZN7MyClassIisE7foo_tmlEv.default(
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
||||
// CHECK-SAME: ptr noundef nonnull align 1 dereferenceable(1) [[THIS:%.*]]) #[[ATTR1]] comdat {
|
||||
// CHECK-NEXT: [[ENTRY:.*:]]
|
||||
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
||||
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
||||
@@ -240,11 +240,10 @@ void run_foo_tml() {
|
||||
// CHECK-NEXT: ret ptr @_ZN7MyClassIisE7foo_tmlEv.default
|
||||
//
|
||||
//.
|
||||
// CHECK: attributes #[[ATTR0]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon" }
|
||||
// CHECK: attributes #[[ATTR1]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ls64" }
|
||||
// CHECK: attributes #[[ATTR2]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
|
||||
// CHECK: attributes #[[ATTR3]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fptoint" }
|
||||
// CHECK: attributes #[[ATTR4]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+sme,+sme-f64f64" }
|
||||
// CHECK: attributes #[[ATTR0]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+ls64,+neon" }
|
||||
// CHECK: attributes #[[ATTR1]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
|
||||
// CHECK: attributes #[[ATTR2]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fptoint" }
|
||||
// CHECK: attributes #[[ATTR3]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+sme,+sme-f64f64" }
|
||||
//.
|
||||
// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
|
||||
// CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}
|
||||
|
||||
@@ -5,7 +5,7 @@ void __attribute__((target_clones("fp16+sve2-aes", "sb+sve2-sha3+rcpc3+mops", "r
|
||||
// expected-warning@+1 {{unsupported 'default' in the 'target_clones' attribute string; 'target_clones' attribute ignored}}
|
||||
void __attribute__((target_clones("default+sha3"))) warn1(void);
|
||||
// expected-warning@+1 {{version list contains entries that don't impact code generation}}
|
||||
void __attribute__((target_clones("ssbs+ls64"))) warn2(void);
|
||||
void __attribute__((target_clones("ssbs"))) warn2(void);
|
||||
|
||||
// expected-error@+2 {{'target_clones' and 'target_version' attributes are not compatible}}
|
||||
// expected-note@+1 {{conflicting attribute is here}}
|
||||
@@ -24,7 +24,7 @@ int __attribute__((target_clones("rng", "fp16fml+fp", "default"))) redecl4(void)
|
||||
// expected-error@+3 {{'target_clones' attribute does not match previous declaration}}
|
||||
// expected-note@-2 {{previous declaration is here}}
|
||||
// expected-warning@+1 {{version list contains entries that don't impact code generation}}
|
||||
int __attribute__((target_clones("dgh+memtag+rpres+ls64_v", "ebf16+dpb+sha1", "default"))) redecl4(void) { return 1; }
|
||||
int __attribute__((target_clones("dgh+memtag+rpres", "ebf16+dpb+sha1", "default"))) redecl4(void) { return 1; }
|
||||
|
||||
int __attribute__((target_version("flagm2"))) redef2(void) { return 1; }
|
||||
// expected-error@+2 {{multiversioned function redeclarations require identical target attributes}}
|
||||
|
||||
@@ -73,8 +73,8 @@ enum CPUFeatures {
|
||||
FEAT_SSBS,
|
||||
FEAT_SSBS2,
|
||||
FEAT_BTI,
|
||||
FEAT_LS64,
|
||||
FEAT_LS64_V,
|
||||
RESERVED_FEAT_LS64, // previously used and now ABI legacy
|
||||
RESERVED_FEAT_LS64_V, // previously used and now ABI legacy
|
||||
FEAT_LS64_ACCDATA,
|
||||
FEAT_WFXT,
|
||||
FEAT_SME_F64,
|
||||
|
||||
@@ -110,12 +110,6 @@ static void __init_cpu_features_constructor(unsigned long hwcap,
|
||||
/* ID_AA64ISAR1_EL1.SPECRES >= 0b0001 */
|
||||
if (extractBits(ftr, 40, 4) >= 0x1)
|
||||
setCPUFeature(FEAT_PREDRES);
|
||||
/* ID_AA64ISAR1_EL1.LS64 >= 0b0001 */
|
||||
if (extractBits(ftr, 60, 4) >= 0x1)
|
||||
setCPUFeature(FEAT_LS64);
|
||||
/* ID_AA64ISAR1_EL1.LS64 >= 0b0010 */
|
||||
if (extractBits(ftr, 60, 4) >= 0x2)
|
||||
setCPUFeature(FEAT_LS64_V);
|
||||
/* ID_AA64ISAR1_EL1.LS64 >= 0b0011 */
|
||||
if (extractBits(ftr, 60, 4) >= 0x3)
|
||||
setCPUFeature(FEAT_LS64_ACCDATA);
|
||||
|
||||
@@ -73,8 +73,8 @@ enum CPUFeatures {
|
||||
FEAT_SSBS,
|
||||
FEAT_SSBS2,
|
||||
FEAT_BTI,
|
||||
FEAT_LS64,
|
||||
FEAT_LS64_V,
|
||||
RESERVED_FEAT_LS64, // previously used and now ABI legacy
|
||||
RESERVED_FEAT_LS64_V, // previously used and now ABI legacy
|
||||
FEAT_LS64_ACCDATA,
|
||||
FEAT_WFXT,
|
||||
FEAT_SME_F64,
|
||||
|
||||
@@ -58,9 +58,7 @@ def : FMVExtension<"fp16fml", "FEAT_FP16FML", "+fp16fml,+fullfp16,+fp-armv8,+neo
|
||||
def : FMVExtension<"frintts", "FEAT_FRINTTS", "+fptoint", 250>;
|
||||
def : FMVExtension<"i8mm", "FEAT_I8MM", "+i8mm", 270>;
|
||||
def : FMVExtension<"jscvt", "FEAT_JSCVT", "+fp-armv8,+neon,+jsconv", 210>;
|
||||
def : FMVExtension<"ls64", "FEAT_LS64", "", 520>;
|
||||
def : FMVExtension<"ls64_accdata", "FEAT_LS64_ACCDATA", "+ls64", 540>;
|
||||
def : FMVExtension<"ls64_v", "FEAT_LS64_V", "", 530>;
|
||||
def : FMVExtension<"ls64", "FEAT_LS64_ACCDATA", "+ls64", 520>;
|
||||
def : FMVExtension<"lse", "FEAT_LSE", "+lse", 80>;
|
||||
def : FMVExtension<"memtag", "FEAT_MEMTAG", "", 440>;
|
||||
def : FMVExtension<"memtag2", "FEAT_MEMTAG2", "+mte", 450>;
|
||||
|
||||
Reference in New Issue
Block a user