AMDGPU: Add range to wavefrontsize intrinsic declaration (#136303)
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@@ -234,9 +234,11 @@ def int_amdgcn_init_exec_from_input : Intrinsic<[],
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def int_amdgcn_init_whole_wave : Intrinsic<[llvm_i1_ty], [], [
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IntrHasSideEffects, IntrNoMem, IntrConvergent]>;
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def int_amdgcn_wavefrontsize :
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ClangBuiltin<"__builtin_amdgcn_wavefrontsize">,
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DefaultAttrsIntrinsic<[llvm_i32_ty], [], [NoUndef<RetIndex>, IntrNoMem, IntrSpeculatable]>;
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def int_amdgcn_wavefrontsize
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: ClangBuiltin<"__builtin_amdgcn_wavefrontsize">,
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DefaultAttrsIntrinsic<[llvm_i32_ty], [],
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[NoUndef<RetIndex>, Range<RetIndex, 32, 65>,
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IntrNoMem, IntrSpeculatable]>;
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// Represent a relocation constant.
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def int_amdgcn_reloc_constant : DefaultAttrsIntrinsic<
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@@ -18,4 +18,12 @@ define i32 @ds_consume(ptr addrspace(3) %ptr) {
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ret i32 %ret
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}
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; Test assumed range
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; CHECK: declare noundef range(i32 32, 65) i32 @llvm.amdgcn.wavefrontsize() #1
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define i32 @wavefrontsize() {
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%ret = call i32 @llvm.amdgcn.wavefrontsize()
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ret i32 %ret
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}
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; CHECK: attributes #0 = { convergent nocallback nofree nounwind willreturn memory(argmem: readwrite) }
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; CHECK: attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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@@ -39,7 +39,7 @@ define amdgpu_kernel void @fold_and_optimize_wavefrontsize(ptr addrspace(1) noca
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; OPT-SAME: ptr addrspace(1) captures(none) [[ARG:%.*]]) {
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; OPT-NEXT: [[BB:.*:]]
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; OPT-NEXT: [[TMP:%.*]] = tail call i32 @llvm.amdgcn.wavefrontsize() #[[ATTR1]]
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; OPT-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP]], 32
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; OPT-NEXT: [[TMP1:%.*]] = icmp samesign ugt i32 [[TMP]], 32
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; OPT-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 2, i32 1
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; OPT-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARG]], align 4
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; OPT-NEXT: ret void
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@@ -69,7 +69,7 @@ define amdgpu_kernel void @fold_and_optimize_if_wavefrontsize(ptr addrspace(1) n
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; OPT-SAME: ptr addrspace(1) captures(none) [[ARG:%.*]]) {
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; OPT-NEXT: [[BB:.*:]]
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; OPT-NEXT: [[TMP:%.*]] = tail call i32 @llvm.amdgcn.wavefrontsize() #[[ATTR1]]
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; OPT-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[TMP]], 32
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; OPT-NEXT: [[TMP1:%.*]] = icmp samesign ugt i32 [[TMP]], 32
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; OPT-NEXT: br i1 [[TMP1]], label %[[BB2:.*]], label %[[BB3:.*]]
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; OPT: [[BB2]]:
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; OPT-NEXT: store i32 1, ptr addrspace(1) [[ARG]], align 4
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