[AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (#139700)
This LLVM defect was identified via the AMD Fuzzing project. --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
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@@ -666,7 +666,9 @@ static Value *promoteAllocaUserToVector(
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SmallVector<int> Mask;
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for (unsigned Idx = 0; Idx < VectorTy->getNumElements(); ++Idx) {
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if (Idx >= DestBegin && Idx < DestBegin + NumCopied) {
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Mask.push_back(SrcBegin++);
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Mask.push_back(SrcBegin < VectorTy->getNumElements()
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? SrcBegin++
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: PoisonMaskElem);
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} else {
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Mask.push_back(Idx);
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}
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44
llvm/test/CodeGen/AMDGPU/promote-alloca-shufflevector.ll
Normal file
44
llvm/test/CodeGen/AMDGPU/promote-alloca-shufflevector.ll
Normal file
@@ -0,0 +1,44 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -mtriple amdgcn -passes=amdgpu-promote-alloca-to-vector -S < %s | FileCheck %s
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; Skip promote-alloca in case of an index which is known to be out of bounds.
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define amdgpu_kernel void @out_of_bounds() {
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; CHECK-LABEL: define amdgpu_kernel void @out_of_bounds() {
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; CHECK-NEXT: [[PTR:%.*]] = freeze <4 x float> poison
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[PTR]], <4 x float> poison, <4 x i32> <i32 poison, i32 poison, i32 2, i32 3>
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; CHECK-NEXT: ret void
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;
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%ptr = alloca [4 x float], align 4, addrspace(5)
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%elem_ptr = getelementptr [4 x float], ptr addrspace(5) %ptr, i32 0, i32 42
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call void @llvm.memcpy.p5.p5.i32(ptr addrspace(5) %ptr, ptr addrspace(5) %elem_ptr, i32 8, i1 false)
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ret void
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}
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define amdgpu_kernel void @memcpy_partially_out_of_bounds() {
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; CHECK-LABEL: define amdgpu_kernel void @memcpy_partially_out_of_bounds() {
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; CHECK-NEXT: [[PTR:%.*]] = freeze <3 x float> poison
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> [[PTR]], <3 x float> poison, <3 x i32> <i32 2, i32 poison, i32 2>
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; CHECK-NEXT: ret void
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;
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%ptr = alloca [3 x float], align 4, addrspace(5)
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%elem_ptr = getelementptr [3 x float], ptr addrspace(5) %ptr, i32 0, i32 2
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call void @llvm.memcpy.p5.p5.i32(ptr addrspace(5) %ptr, ptr addrspace(5) %elem_ptr, i32 8, i1 false)
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ret void
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}
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define amdgpu_kernel void @in_bounds() {
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; CHECK-LABEL: define amdgpu_kernel void @in_bounds() {
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; CHECK-NEXT: [[PTR:%.*]] = freeze <4 x float> poison
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[PTR]], <4 x float> poison, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
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; CHECK-NEXT: ret void
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;
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%ptr = alloca [4 x float], align 4, addrspace(5)
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%elem_ptr = getelementptr [4 x float], ptr addrspace(5) %ptr, i32 0, i32 2
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call void @llvm.memcpy.p5.p5.i32(ptr addrspace(5) %ptr, ptr addrspace(5) %elem_ptr, i32 8, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p5.p5.i32(ptr addrspace(5) writeonly captures(none), ptr addrspace(5) readonly captures(none), i32, i1 immarg) #0
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attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
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