[CodeGen] Use llvm::append_range (NFC) (#135567)

llvm/lib/CodeGen/AsmPrinter/WinException.cpp

@@ -162,8 +162,7 @@ void WinException::endFunction(const MachineFunction *MF) {
 
   if (!MF->getEHContTargets().empty()) {
     // Copy the function's EH Continuation targets to a module-level list.
-    EHContTargets.insert(EHContTargets.end(), MF->getEHContTargets().begin(),
-                         MF->getEHContTargets().end());
+    llvm::append_range(EHContTargets, MF->getEHContTargets());
   }
 }
 
@@ -292,8 +291,7 @@ void WinException::endFuncletImpl() {
 
     if (!MF->getEHContTargets().empty()) {
       // Copy the function's EH Continuation targets to a module-level list.
-      EHContTargets.insert(EHContTargets.end(), MF->getEHContTargets().begin(),
-                           MF->getEHContTargets().end());
+      llvm::append_range(EHContTargets, MF->getEHContTargets());
     }
 
     // Switch back to the funclet start .text section now that we are done

llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

@@ -1765,7 +1765,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
         LLT GCDTy = extractGCDType(WidenedXors, NarrowTy, LeftoverTy, Xor);
         buildLCMMergePieces(LeftoverTy, NarrowTy, GCDTy, WidenedXors,
                             /* PadStrategy = */ TargetOpcode::G_ZEXT);
-        Xors.insert(Xors.end(), WidenedXors.begin(), WidenedXors.end());
+        llvm::append_range(Xors, WidenedXors);
       }
 
       // Now, for each part we broke up, we know if they are equal/not equal

llvm/lib/CodeGen/MachineLICM.cpp

@@ -1487,8 +1487,7 @@ void MachineLICMImpl::InitializeLoadsHoistableLoops() {
     auto *L = Worklist.pop_back_val();
     AllowedToHoistLoads[L] = true;
     LoopsInPreOrder.push_back(L);
-    Worklist.insert(Worklist.end(), L->getSubLoops().begin(),
-                    L->getSubLoops().end());
+    llvm::append_range(Worklist, L->getSubLoops());
   }
 
   // Going from the innermost to outermost loops, check if a loop has

llvm/lib/CodeGen/RegisterCoalescer.cpp

@@ -3814,8 +3814,7 @@ bool RegisterCoalescer::joinVirtRegs(CoalescerPair &CP) {
     // into an existing tracking collection, or insert a new one.
     RegIt = RegToPHIIdx.find(CP.getDstReg());
     if (RegIt != RegToPHIIdx.end())
-      RegIt->second.insert(RegIt->second.end(), InstrNums.begin(),
-                           InstrNums.end());
+      llvm::append_range(RegIt->second, InstrNums);
     else
       RegToPHIIdx.insert({CP.getDstReg(), InstrNums});
   }

llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp

@@ -530,7 +530,7 @@ SDNode *DAGTypeLegalizer::AnalyzeNewNode(SDNode *N) {
       NewOps.push_back(Op);
     } else if (Op != OrigOp) {
       // This is the first operand to change - add all operands so far.
-      NewOps.insert(NewOps.end(), N->op_begin(), N->op_begin() + i);
+      llvm::append_range(NewOps, N->ops().take_front(i));
       NewOps.push_back(Op);
     }
   }

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

@@ -2320,7 +2320,7 @@ void SelectionDAGISel::SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops,
                               SelOps.size());
       Flags.setMemConstraint(ConstraintID);
       Handles.emplace_back(CurDAG->getTargetConstant(Flags, DL, MVT::i32));
-      Handles.insert(Handles.end(), SelOps.begin(), SelOps.end());
+      llvm::append_range(Handles, SelOps);
       i += 2;
     }
   }