[BOLT] Rename isLoad/isStore to mayLoad/mayStore

As discussed in D159266, for some instructions it's impossible to know
statically if they will load/store (e.g., predicated instructions).
Therefore, mayLoad/mayStore are more appropriate names.

bolt/include/bolt/Core/MCPlusBuilder.h

@@ -613,11 +613,11 @@ public:
 
   virtual bool isMoveMem2Reg(const MCInst &Inst) const { return false; }
 
-  virtual bool isLoad(const MCInst &Inst) const {
+  virtual bool mayLoad(const MCInst &Inst) const {
     return Info->get(Inst.getOpcode()).mayLoad();
   }
 
-  virtual bool isStore(const MCInst &Inst) const {
+  virtual bool mayStore(const MCInst &Inst) const {
     return Info->get(Inst.getOpcode()).mayStore();
   }
 

bolt/lib/Core/DynoStats.cpp

@@ -215,10 +215,10 @@ DynoStats getDynoStats(BinaryFunction &BF) {
         }
       }
 
-      if (BC.MIB->isStore(Instr)) {
+      if (BC.MIB->mayStore(Instr)) {
         Stats[DynoStats::STORES] += BBExecutionCount;
       }
-      if (BC.MIB->isLoad(Instr)) {
+      if (BC.MIB->mayLoad(Instr)) {
         Stats[DynoStats::LOADS] += BBExecutionCount;
       }
       if (!BC.MIB->isCall(Instr))

bolt/lib/Passes/ShrinkWrapping.cpp

@@ -1960,7 +1960,7 @@ bool ShrinkWrapping::perform(bool HotOnly) {
     for (const auto &Instr : *BB) {
       if (BC.MIB->isPseudo(Instr))
         continue;
-      if (BC.MIB->isStore(Instr))
+      if (BC.MIB->mayStore(Instr))
         TotalStoreInstrs += BBExecCount;
       TotalInstrs += BBExecCount;
     }

bolt/lib/Passes/StokeInfo.cpp

@@ -75,7 +75,7 @@ void StokeInfo::checkInstr(const BinaryFunction &BF, StokeFuncInfo &FuncInfo) {
       if (IsPush)
         FuncInfo.StackOut = true;
 
-      if (MIB->isStore(It) && !IsPush && !IsRipAddr)
+      if (MIB->mayStore(It) && !IsPush && !IsRipAddr)
         FuncInfo.HeapOut = true;
 
       if (IsRipAddr)

bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp

@@ -268,12 +268,12 @@ public:
             Inst.getOpcode() == AArch64::LDRXui);
   }
 
-  bool isLoad(const MCInst &Inst) const override {
+  bool mayLoad(const MCInst &Inst) const override {
     return isLDRB(Inst) || isLDRH(Inst) || isLDRW(Inst) || isLDRX(Inst);
   }
 
   bool isLoadFromStack(const MCInst &Inst) const {
-    if (!isLoad(Inst))
+    if (!mayLoad(Inst))
       return false;
     for (const MCOperand &Operand : useOperands(Inst)) {
       if (!Operand.isReg())
@@ -680,7 +680,7 @@ public:
     PCRelBase = DefBaseAddr;
     // Match LOAD to load the jump table (relative) target
     const MCInst *DefLoad = UsesAdd[2];
-    assert(isLoad(*DefLoad) &&
+    assert(mayLoad(*DefLoad) &&
            "Failed to match indirect branch load pattern! (1)");
     assert((ScaleValue != 1LL || isLDRB(*DefLoad)) &&
            "Failed to match indirect branch load pattern! (2)");
@@ -1013,7 +1013,7 @@ public:
     return true;
   }
 
-  bool isStore(const MCInst &Inst) const override { return false; }
+  bool mayStore(const MCInst &Inst) const override { return false; }
 
   bool createDirectCall(MCInst &Inst, const MCSymbol *Target, MCContext *Ctx,
                         bool IsTailCall) override {

bolt/lib/Target/X86/X86MCPlusBuilder.cpp

@@ -350,7 +350,7 @@ public:
     }
   }
 
-  bool isLoad(const MCInst &Inst) const override {
+  bool mayLoad(const MCInst &Inst) const override {
     if (isPop(Inst))
       return true;
 
@@ -363,7 +363,7 @@ public:
     return MCII.mayLoad();
   }
 
-  bool isStore(const MCInst &Inst) const override {
+  bool mayStore(const MCInst &Inst) const override {
     if (isPush(Inst))
       return true;
 
@@ -1755,7 +1755,7 @@ public:
     // - Non-stack loads are prohibited (generally unsafe)
     // - Stack loads are OK if AllowStackMemOp is true
     // - Stack loads with RBP are OK if AllowBasePtrStackMemOp is true
-    if (isLoad(Inst)) {
+    if (mayLoad(Inst)) {
       // If stack memory operands are not allowed, no loads are allowed
       if (!AllowStackMemOp)
         return false;
@@ -2190,7 +2190,7 @@ public:
       MCInst &CurInst = *Itr++;
       const MCInstrDesc &Desc = Info->get(CurInst.getOpcode());
       if (Desc.hasDefOfPhysReg(CurInst, MethodRegNum, *RegInfo)) {
-        if (!isLoad(CurInst))
+        if (!mayLoad(CurInst))
           return false;
         if (std::optional<X86MemOperand> MO =
                 evaluateX86MemoryOperand(CurInst)) {