caio/clang-p2996
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[Target] Prevent copying in loop variables (NFC)

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/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp:2769:19: error: loop variable '[Reg, N]' creates a copy from type 'std::pair<unsigned int, llvm::SDValue> const' [-Werror,-Wrange-loop-construct]
  for (const auto [Reg, N] : RegsToPass) {
                  ^
/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp:2769:8: note: use reference type 'std::pair<unsigned int, llvm::SDValue> const &' to prevent copying
  for (const auto [Reg, N] : RegsToPass) {
       ^~~~~~~~~~~~~~~~~~~~~
                  &
/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp:2954:19: error: loop variable '[Reg, N]' creates a copy from type 'std::pair<unsigned int, llvm::SDValue> const' [-Werror,-Wrange-loop-construct]
  for (const auto [Reg, N] : RegsToPass)
                  ^
/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp:2954:8: note: use reference type 'std::pair<unsigned int, llvm::SDValue> const &' to prevent copying
  for (const auto [Reg, N] : RegsToPass)
       ^~~~~~~~~~~~~~~~~~~~~
                  &
2 errors generated.
This commit is contained in:
Jie Fu
2025-06-28 19:29:00 +08:00
parent 5ea29f77b9
commit feb61f5b05
3 changed files with 5 additions and 5 deletions
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2
llvm/lib/Target/ARM/ARMFrameLowering.cpp
View File

@@ -1701,7 +1701,7 @@ void ARMFrameLowering::emitPushInst(MachineBasicBlock &MBB,
.addReg(ARM::SP)
.setMIFlags(MachineInstr::FrameSetup)
.add(predOps(ARMCC::AL));
for (const auto [Reg, Kill] : Regs)
for (const auto &[Reg, Kill] : Regs)
MIB.addReg(Reg, getKillRegState(Kill));
} else if (Regs.size() == 1) {
BuildMI(MBB, MI, DL, TII.get(StrOpc), ARM::SP)

4
llvm/lib/Target/ARM/ARMISelLowering.cpp
View File

@@ -2766,7 +2766,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Build a sequence of copy-to-reg nodes chained together with token chain
// and flag operands which copy the outgoing args into the appropriate regs.
SDValue InGlue;
for (const auto [Reg, N] : RegsToPass) {
for (const auto &[Reg, N] : RegsToPass) {
Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
InGlue = Chain.getValue(1);
}
@@ -2951,7 +2951,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Add argument registers to the end of the list so that they are known live
// into the call.
for (const auto [Reg, N] : RegsToPass)
for (const auto &[Reg, N] : RegsToPass)
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
// Add a register mask operand representing the call-preserved registers.

4
llvm/lib/Target/X86/X86ISelLoweringCall.cpp
View File

@@ -2421,7 +2421,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Build a sequence of copy-to-reg nodes chained together with token chain
// and glue operands which copy the outgoing args into registers.
SDValue InGlue;
for (const auto [Reg, N] : RegsToPass) {
for (const auto &[Reg, N] : RegsToPass) {
Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
InGlue = Chain.getValue(1);
}
@@ -2461,7 +2461,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Add argument registers to the end of the list so that they are known live
// into the call.
for (const auto [Reg, N] : RegsToPass)
for (const auto &[Reg, N] : RegsToPass)
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
// Add a register mask operand representing the call-preserved registers.