Commit Graph

285876 Commits

Author SHA1 Message Date
Simon Pilgrim
351e4fa0e2 [ARM] Remove sched model instregex entries that don't match any instructions (D44687)
Reviewed by @javed.absar

llvm-svn: 328457
2018-03-25 19:07:17 +00:00
Simon Pilgrim
854ac7490d [X86] Add missing full stop to comment. NFCI.
llvm-svn: 328456
2018-03-25 18:49:48 +00:00
Sanjay Patel
c84b48ec29 [InstSimplify, InstCombine] add/update tests with FP +0.0 vector with undef; NFC
llvm-svn: 328455
2018-03-25 17:48:20 +00:00
Craig Topper
972bdbd415 [X86][SkylakeClient] Fix a set of regular expressions that were checking for optionally starting with 'Y' instead of 'V'
These bad regexs were introduced by r328435

llvm-svn: 328454
2018-03-25 17:33:14 +00:00
Simon Pilgrim
562e8b4eae [X86][MMX] MOVQ2DQ/MOVDQ2Q are better described as WriteVecMove than WriteMove
Not that it makes a difference to current cost values, but will when we try to better model GPR-SIMD transfer costs

llvm-svn: 328453
2018-03-25 17:28:06 +00:00
Simon Pilgrim
25acc0a79b [X86][SkylakeServer] Merge multiple instregex. NFCI
llvm-svn: 328452
2018-03-25 17:25:37 +00:00
Craig Topper
a985919d3e [X86] Update cost model for Goldmont. Add fsqrt costs for Silvermont
Add fdiv costs for Goldmont using table 16-17 of the Intel Optimization Manual. Also add overrides for FSQRT for Goldmont and Silvermont.

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44644

llvm-svn: 328451
2018-03-25 15:58:12 +00:00
Sanjay Patel
e94a85533f [InstCombine] adjust test comments; NFC
llvm-svn: 328450
2018-03-25 14:24:32 +00:00
Sanjay Patel
60d0e119c7 [InstCombine] consolidate casted icmp vector tests
We have thorough coverage of predicates and scalar types,
so we just need a sampling of vector tests to show that
things are working or not with vectors types.

llvm-svn: 328449
2018-03-25 14:19:25 +00:00
Sanjay Patel
841aac04d4 [InstCombine] peek through more icmp of FP cast + bitcast
This is an extension of rL328426 as noted in D44367. 

llvm-svn: 328448
2018-03-25 14:01:42 +00:00
Yaron Keren
48baeb0e77 Remove reference to stale (2009) python version.
llvm-svn: 328447
2018-03-25 13:12:05 +00:00
Simon Pilgrim
e3547af7be [X86] Add the ability to override memory folding latency to schedules and add 1uop for memory folds for Intel models
The Intel models need an extra 1uop for memory folded instructions, plus a lot of instructions take a non-default memory latency which should allow us to use the multiclass a lot more to tidy things up.

Differential Revision: https://reviews.llvm.org/D44840

llvm-svn: 328446
2018-03-25 10:21:19 +00:00
Eric Fiselier
98acdde59a avoid new/delete ellision in construct.pass.cpp
llvm-svn: 328445
2018-03-25 03:00:42 +00:00
Craig Topper
e8f4e747bf [X86] Consistently prefix all defs in X86ScheduleSLM.td with 'SLM'.
llvm-svn: 328444
2018-03-25 01:28:43 +00:00
Martin Storsjo
98720156b9 [X86] Update a partially stale comment, since SVN r328386. NFC.
llvm-svn: 328443
2018-03-24 23:00:00 +00:00
Craig Topper
2ed540779d [SchedModel] Remove an unneeded temporary vector.
llvm-svn: 328442
2018-03-24 22:58:03 +00:00
Craig Topper
18cfa2c710 [SchedModel] Use std::move in a couple places to reduce copying
llvm-svn: 328441
2018-03-24 22:58:02 +00:00
Craig Topper
59d13776f7 [SchedModel] Use std::move to replace a vector instead of vector::swap
We don't really care about the old vector value so we don't care to swap it.

llvm-svn: 328440
2018-03-24 22:58:00 +00:00
Eric Fiselier
c413e4d9b8 Fix module.modulemap after r328395
This patch removes the MachineValueType module since the
header was removed in r328395.

llvm-svn: 328439
2018-03-24 22:14:02 +00:00
Craig Topper
9f3293a9d4 [SchedModel] Remove std::vectors that were created with 1 element and then passed to an ArrayRef parameter.
ArrayRef can capture a single element. We don't need a vector for that.

llvm-svn: 328438
2018-03-24 21:57:35 +00:00
Simon Pilgrim
494d07516e [SchedModel] Record::getName() returns StringRef - avoid std::string creation. NFCI.
llvm-svn: 328437
2018-03-24 21:22:32 +00:00
Simon Pilgrim
34d512ec1e [SchedModel] Avoid std::string creation for instregex patterns that don't contain regex metas. NFCI.
llvm-svn: 328436
2018-03-24 21:04:20 +00:00
Simon Pilgrim
31a9633724 [X86][SkylakeClient] Merge xmm/ymm instructions instregex entries to reduce regex matches to reduce compile time
llvm-svn: 328435
2018-03-24 20:40:14 +00:00
Simon Pilgrim
c21deec37b [X86][Broadwell] Merge xmm/ymm instructions instregex entries to reduce regex matches to reduce compile time
llvm-svn: 328434
2018-03-24 19:37:28 +00:00
Mandeep Singh Grang
98bc25a0f2 [RISCV] Use init_array instead of ctors for RISCV target, by default
Summary:
LLVM defaults to the newer .init_array/.fini_array scheme for static
constructors rather than the less desirable .ctors/.dtors (the UseCtors
flag defaults to false). This wasn't being respected in the RISC-V
backend because it fails to call TargetLoweringObjectFileELF::InitializeELF with the the appropriate
flag for UseInitArray.
This patch fixes this by implementing RISCVELFTargetObjectFile and overriding its Initialize method to call
InitializeELF(TM.Options.UseInitArray).

Reviewers: asb, apazos

Reviewed By: asb

Subscribers: mgorny, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, llvm-commits

Differential Revision: https://reviews.llvm.org/D44750

llvm-svn: 328433
2018-03-24 18:37:19 +00:00
Simon Pilgrim
2b5967f510 [X86][Haswell] Merge xmm/ymm instructions instregex entries to reduce regex matches to reduce compile time
llvm-svn: 328432
2018-03-24 18:36:01 +00:00
Simon Pilgrim
efcf1d85b3 [X86][SandyBridge] Merge xmm/ymm instructions instregex entries to reduce regex matches to reduce compile time
llvm-svn: 328431
2018-03-24 18:12:59 +00:00
Mandeep Singh Grang
db00e2e20f [Hexagon] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort. Refer the comments section in D44363 for a list of all the required patches.

Reviewers: kparzysz

Reviewed By: kparzysz

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44857

llvm-svn: 328430
2018-03-24 17:34:37 +00:00
Mandeep Singh Grang
860adef9e6 [AMDGPU] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Reviewers: tstellar, RKSimon, arsenm

Reviewed By: arsenm

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D44856

llvm-svn: 328429
2018-03-24 17:15:04 +00:00
Andrea Di Biagio
94fafdfded [llvm-mca] run clang-format on all files.
This also addresses Simon's review comment in D44839.

llvm-svn: 328428
2018-03-24 16:05:36 +00:00
Andrea Di Biagio
225d0db4e2 [llvm-mca] Remove unused field in InstrBuilder. NFC
llvm-svn: 328427
2018-03-24 15:48:25 +00:00
Sanjay Patel
745a9c62c2 [InstCombine] peek through FP casts for sign-bit compares (PR36682)
This pattern came up in PR36682:
https://bugs.llvm.org/show_bug.cgi?id=36682
https://godbolt.org/g/LhuD9A

Equality checks are planned as a follow-up enhancement.

Differential Revision: https://reviews.llvm.org/D44367

llvm-svn: 328426
2018-03-24 15:45:02 +00:00
Sanjay Patel
286074e8a1 [InstCombine] fix formatting; NFC
llvm-svn: 328425
2018-03-24 15:41:59 +00:00
Simon Pilgrim
913345f8f5 [X86][AES] Ensure we're testing both non-VEX/VEX variants of AES instructions on AVX targets
Add skylake server tests as well

llvm-svn: 328424
2018-03-24 15:05:12 +00:00
Simon Pilgrim
91fe24b8cf [X86][SSE] Ensure we're testing both non-VEX/VEX variants of SSE instructions on AVX targets
And ensure we don't use later instruction sets in SSE schedule tests

llvm-svn: 328423
2018-03-24 14:51:52 +00:00
Sanjay Patel
6a176d527c [InstCombine] add multi-use/vector tests for intrinsic shrinking; NFC
llvm-svn: 328422
2018-03-24 14:45:41 +00:00
Simon Pilgrim
f7d0f7e6db [X86][AVX1] Ensure we don't use later instruction sets in AVX1 schedule tests
llvm-svn: 328421
2018-03-24 13:47:48 +00:00
Simon Pilgrim
d2016f95fb [X86][AVX2] Ensure we don't use later instruction sets in AVX2 schedule tests
llvm-svn: 328420
2018-03-24 13:47:01 +00:00
George Rimar
d8281379f9 [ELF] - Do not ignore discarding of .rela.plt/.rela.dyn, allow doing custom layout for them.
Currently when we build input sections list in linker script
we ignore all rel[a] sections. That was done to support
scripts like .rela.dyn : { *(.rela.data) } for emit relocs.

Though as a result following scripts were also silently ignored:

/DISCARD/ : { *(.rela.plt)
/DISCARD/ : { *(.rela.dyn)

and we produced output with this sections. That is not ideal.
The solution this patch suggests is simple: do not ignore synthetic
rel[a] sections. That way we can enable common discarding logic
for them and report a proper error.

Differential revision: https://reviews.llvm.org/D41640

llvm-svn: 328419
2018-03-24 13:10:19 +00:00
Jonathan Coe
96d81916b0 [clang-tidy] Enable Python 3 support for add_new_check.py
Summary: In Python 3, filters are lazily evaluated and strings are not bytes.

Reviewers: ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: xazax.hun, cfe-commits

Differential Revision: https://reviews.llvm.org/D44217

llvm-svn: 328418
2018-03-24 10:49:17 +00:00
Vitaly Buka
f791c9659b [sanitizer] Fix Darwin build
llvm-svn: 328417
2018-03-24 08:13:18 +00:00
Craig Topper
097b47a0fc [X86] Add a new disassembler opcode map for 3DNow. Stop treating 3DNow as an attribute.
This reduces the size of llvm-mc by at least 150k since we no longer have to multiply the attribute across 7 tables.

llvm-svn: 328416
2018-03-24 07:48:54 +00:00
Vitaly Buka
8616363017 Mmap interceptor providing mprotect support
Summary:
- Intercepting mprotect calls.
- Fixing forgotten flag check.

Patch by David CARLIER

Reviewers: vitalybuka, vsk

Subscribers: delcypher, srhines, kubamracek, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D44777

llvm-svn: 328415
2018-03-24 07:45:24 +00:00
Vitaly Buka
eb8a3674ec [sanitizer] Fix strlcpy and strlcat interceptors on Darwin
llvm-svn: 328414
2018-03-24 07:31:59 +00:00
Craig Topper
c0e1880db9 [X86] Use unique_ptr to simplify memory management. NFC
llvm-svn: 328413
2018-03-24 07:15:47 +00:00
Craig Topper
a51ec94d68 [X86] Use X86_INSTR_MRM_MAPPING macro instead of listing all MRM_C0-MRM_FF format encodings. NFC
llvm-svn: 328412
2018-03-24 07:15:46 +00:00
Craig Topper
0bafe239fc [X86] Remove an unnecessary switch around two other switches. NFC
The outer switch only had one valid block so didn't provide any value.

llvm-svn: 328411
2018-03-24 07:15:45 +00:00
Craig Topper
e865641aea [X86] Merge the Has3DNow0F0FOpcode TSFlag into the OpMap encoding. NFC
The 3DNow instructions are encoded a little weird, but we can still represent it as an opcode map.

llvm-svn: 328410
2018-03-24 06:04:12 +00:00
Zhihao Yuan
2c5471ddc7 [C++17] Fix class template argument deduction for default constructors without an initializer
Summary:
As the title says, this makes following code compile:

```
template<typename> struct Foo {};
Foo() -> Foo<void>;

Foo f; // ok
```

Thanks Nicolas Lesser for coining the fix.

Reviewers: rsmith, lichray

Reviewed By: rsmith, lichray

Subscribers: lichray, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D38216

llvm-svn: 328409
2018-03-24 04:32:11 +00:00
Eric Christopher
40eb34607c Add REQUIRES lines for the targets being checked in this test.
llvm-svn: 328408
2018-03-24 02:56:58 +00:00