Commit Graph

322720 Commits

Author SHA1 Message Date
Simon Pilgrim
adda256a7d [ARM] Regenerate rotation tests
llvm-svn: 367214
2019-07-29 09:48:07 +00:00
Simon Pilgrim
251b546f1b [AMDGPU] Regenerate v2i16 insertelement tests.
To help show the diffs from an upcoming SimplifyDemandedBits patch.

llvm-svn: 367213
2019-07-29 09:47:07 +00:00
Sam Parker
414dd1c946 [NFC][ARM[ParallelDSP] Cleanup of BinOpChain
- Remove some unused typedefs.
- Rename BinOpChain struct to MulCandidate.
- Remove the size method of MulCandidate.
- Store only the first input of the ValueList provided to
  MulCandidate, as it's the only value we care about. This means we
  don't have to perform any ugly (and unnecessary) iterations of the 
  list later on.

llvm-svn: 367208
2019-07-29 08:41:51 +00:00
Raphael Isemann
4e44c77ab3 [lldb][NFC] Split emitting and parsing in LLDBOptionDefEmitter
Splitting the different logic is cleaner and we it will be easier
to implement the enum emitting (which otherwise would have to
reimplement the Record parsing).

llvm-svn: 367207
2019-07-29 08:22:41 +00:00
David Stuttard
20235ef3e7 [AMDGPU] Enable v4f16 and above for v_pk_fma instructions
Summary:
If isel is presented with <2 x half> vectors then it will correctly select
v_pk_fma style instructions.
If isel is presented with e.g. <4 x half> vectors it will scalarize, unlike for
other instruction types (such as fadd, fmul etc.)

Added extra support to enable this. Updated one of the tests to include a test
for this (as well as extending the test to GFX9)

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65325

Change-Id: I50a4577a3f8223fb53992af3b7d26121f65b71ee
llvm-svn: 367206
2019-07-29 08:15:10 +00:00
Sam Parker
8538060103 [NFC][ARM][ParallelDSP] Remove AreSymmetrical
We explicitly search for a parallel mac and we only care about its
inputs, checking for symmetry doesn't add anything here.

llvm-svn: 367205
2019-07-29 08:12:24 +00:00
Sam Parker
11ad33ede6 [NFC][ARM][ParallelDSP] Remove PopulateLoads
We no longer have to check what loads are used, all this
is performed at the start of the transform, so it's not
doing anything now.

llvm-svn: 367204
2019-07-29 08:07:23 +00:00
George Rimar
aef03e86c1 [obj2yaml] - Report a error when unable to resolve a sh_link reference properly.
Because of a bug we did not report a error in the case
shown in the test. With this patch we do.

Differential revision: https://reviews.llvm.org/D65214

llvm-svn: 367203
2019-07-29 07:58:29 +00:00
George Rimar
99f73ebe5c [llvm-objcopy] - Reimplement strip-dwo-groups.test to stop using the precompiled object.
When llvm-copy removes .dwo sections the index of symbol table,
the indices of the symbols and the indices of the sections which go
after the removed ones changes. That affects on SHT_GROUP sections,
which needs to be updated.

Initially this test used a precompiled object, I rewrote it to use YAML
and improved a bit.

Differential revision: https://reviews.llvm.org/D65273

llvm-svn: 367202
2019-07-29 07:55:39 +00:00
Raphael Isemann
822c58704b [lldb][NFC] Remove DiagnosticManager::CopyDiagnostics
The Diagnostic class in LLDB is suppossed to be inherited from,
so just copying the diagnostics like this is wrong. The function
is also unused, so lets just get rid of it instead of creating
some cloning facility for it.

llvm-svn: 367201
2019-07-29 07:37:17 +00:00
Rui Ueyama
d524c17029 Return early. NFC.
llvm-svn: 367200
2019-07-29 05:24:51 +00:00
Mike Spertus
9aeab53eba Improve MSVC visualizers for DeclSpec and TemplateName
DeclSpec now shows the TypeRep, ExprRep, or DeclRep as appropriate
TemplateName decodes and displays the StorageType
A few minor refinements to other types

llvm-svn: 367199
2019-07-29 03:34:40 +00:00
Craig Topper
eb1beabad9 [X86] Don't use PMADDWD for vector add reductions of multiplies if the mul inputs have an additional user.
The pmaddwd inserts a truncate, if that truncate would end up
creating additional instructions instead of making a zext
narrower, then we shouldn't do it.

I've restricted this to only sse4.1 targets since on prior
targets the zext will be done in stages. So the truncate will
probably not create additional instructions. Might need some
more investigation of mul shrinking and the other pmaddwd
transform to be sure this is the right decision.

There might be a slight regression on AVX1 targets due to add
splitting. Hard to say for sure. Maybe we need to look into
using the vector reduction flag to use 2 narrow loads and a
blend instead of extracting and inserting.

llvm-svn: 367198
2019-07-29 01:36:58 +00:00
Craig Topper
ac9d0f4150 [X86] Add test cases to show missing one use check in combineLoopMAddPattern.
llvm-svn: 367197
2019-07-29 01:36:54 +00:00
Roman Lebedev
6ff633ddc4 [NFC][InstCombine] Revisit tests in shift-amount-reassociation-with-truncation-shl.ll
llvm-svn: 367196
2019-07-28 21:31:58 +00:00
Craig Topper
894916cac9 [X86] In combineLoopMAddPattern and combineLoopSADPattern, preserve the vector reduction flag on the final add. Handle unrolled loops by letting DAG combine revisit.
This reverts r340478 and r340631 and replaces them with a simpler
method of just letting DAG combine revisit the nodes to handle
the other operand.

llvm-svn: 367195
2019-07-28 18:45:42 +00:00
Sanjay Patel
99c57c6daf [InstCombine] fold fsub+fneg with fdiv/fmul between
The backend already does this via isNegatibleForFree(),
but we may want to alter the fneg IR canonicalizations
that currently exist, so we need to try harder to fold
fneg in IR to avoid regressions.

llvm-svn: 367194
2019-07-28 17:10:06 +00:00
Gabor Borsik
2c8098374b Buildbot fix for r367190
llvm-svn: 367193
2019-07-28 14:57:41 +00:00
David Green
b8b8b46a51 [ARM] MVE VPNOT
This adds the patterns required to transform xor P0, -1 to a VPNOT. The
instruction operands have to change a little for this, adding an in and an out
VCCR reg and using a custom DecodeMVEVPNOT for the decode.

Differential Revision: https://reviews.llvm.org/D65133

llvm-svn: 367192
2019-07-28 14:07:48 +00:00
David Green
9cf344e739 [ARM] Better patterns for fp <> predicate vectors
These are some better patterns for converting between predicates and floating
points. Much like the extends, we select "1"/"-1" or "0" depending on the
predicate value. Or we perform a compare against 0 to convert to a predicate.

Differential Revision: https://reviews.llvm.org/D65103

llvm-svn: 367191
2019-07-28 13:53:39 +00:00
Gabor Borsik
4bde15fe1e [analyzer] Add yaml parser to GenericTaintChecker
While we implemented taint propagation rules for several
builtin/standard functions, there's a natural desire for users to add
such rules to custom functions.

A series of patches will implement an option that allows users to
annotate their functions with taint propagation rules through a YAML
file. This one adds parsing of the configuration file, which may be
specified in the commands line with the analyzer config:
alpha.security.taint.TaintPropagation:Config. The configuration may
contain propagation rules, filter functions (remove taint) and sink
functions (give a warning if it gets a tainted value).

I also added a new header for future checkers to conveniently read YAML
files as checker options.

Differential Revision: https://reviews.llvm.org/D59555

llvm-svn: 367190
2019-07-28 13:38:04 +00:00
Roman Lebedev
d5bc4b09f1 [NFC][InstCombine] Shift amount reassociation: can have trunc between shl's
https://rise4fun.com/Alive/OQbM
Not so simple for lshr/ashr, so those maybe later.

https://bugs.llvm.org/show_bug.cgi?id=42391

llvm-svn: 367189
2019-07-28 13:13:46 +00:00
Eugene Leviant
45d910de99 Don't initialize interceptor_metadata_map unless SI_POSIX is set
Differential revision: https://reviews.llvm.org/D64794

llvm-svn: 367188
2019-07-28 08:58:44 +00:00
Hideto Ueno
e7bea9b73a [Attributor] Deduce "align" attribute
Summary:
Deduce "align" attribute in attributor.

Reviewers: jdoerfert, sstefan1

Reviewed By: jdoerfert

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64152

llvm-svn: 367187
2019-07-28 07:04:01 +00:00
Raphael Isemann
bd68a052f2 [lldb] Also include the array definition in CommandOptions.inc
Summary:
Right now our CommandOptions.inc only generates the initializer for the options list but
not the array declaration boilerplate around it. As the array definition is identical for all arrays,
we might as well also let the CommandOptions.inc generate it alongside the initializers.

This patch will also allow us to generate additional declarations related to that option list in
the future (e.g. a enum class representing the specific options which would make our
handling code less prone).

This patch also fixes a few option tables that didn't follow our naming style.

Reviewers: JDevlieghere

Reviewed By: JDevlieghere

Subscribers: abidh, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D65331

llvm-svn: 367186
2019-07-28 06:24:07 +00:00
Hideto Ueno
afd4a37b2a [IR] Fix getPointerAlignment for CallBase
Summary:
In current getPointerAlignemnt implementation, CallBase.getPointerAlignement(..) checks only parameter attriutes in the callsite.  For example,

```
declare align 8 i8* @foo()

define void @bar() {
    %a = tail call align 8 i8* @foo() ; getPointerAlignment returns 8
    %b = tail call i8* @foo() ; getPointerAlignemnt returns 0
    ret void
}
```

This patch will fix the problem.

Reviewers: jdoerfert

Reviewed By: jdoerfert

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65281

llvm-svn: 367185
2019-07-28 06:17:46 +00:00
Hideto Ueno
cc0a4cdc89 [FunctionAttrs] Annotate "willreturn" for intrinsics
Summary:
In D62801, new function attribute `willreturn` was introduced. In short, a function with `willreturn` is guaranteed to come back to the call site(more precise definition is in LangRef).

In this patch, willreturn is annotated for LLVM intrinsics.

Reviewers: jdoerfert

Reviewed By: jdoerfert

Subscribers: jvesely, nhaehnle, sstefan1, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64904

llvm-svn: 367184
2019-07-28 06:09:56 +00:00
Eric Fiselier
d4ace50ed0 Fix PR35637: suboptimal codegen for vector<unsigned char>.
The optimizer is petulant and temperamental. In this case LLVM failed to lower
the the "insert at end" loop used by`vector<unsigned char>` to a `memset` despite
`memset` being substantially faster over a range of bytes.

LLVM has the ability to lower loops to `memset` whet appropriate, but the
odd nature of libc++'s loops prevented the optimization from taking places.

This patch addresses the issue by rewriting the loops from the form
`do [ ... --__n; } while (__n > 0);` to instead use a for loop over a pointer
range (For example: `for (auto *__i = ...; __i < __e; ++__i)`).

This patch also rewrites the asan annotations to unposion all additional memory
at the start of the loop instead of once per iterations. This could potentially
permit false negatives where the constructor of element N attempts to access
element N + 1 during its construction.

The before and after results for the `BM_ConstructSize/vector_byte/5140480_mean`
benchmark (run 5 times) are:

--------------------------------------------------------------------------------------------
Benchmark                                                 Time             CPU   Iterations
--------------------------------------------------------------------------------------------
Before
------
BM_ConstructSize/vector_byte/5140480_mean          12530140 ns     12469693 ns            N/A
BM_ConstructSize/vector_byte/5140480_median        12512818 ns     12445571 ns            N/A
BM_ConstructSize/vector_byte/5140480_stddev          106224 ns       107907 ns            5
-----
After
-----
BM_ConstructSize/vector_byte/5140480_mean            167285 ns       166500 ns            N/A
BM_ConstructSize/vector_byte/5140480_median          166749 ns       166069 ns            N/A
BM_ConstructSize/vector_byte/5140480_stddev            3242 ns         3184 ns            5

llvm-svn: 367183
2019-07-28 04:37:02 +00:00
Bjorn Pettersson
197c08d64e [Driver] Additional fixup of NOWARN test case from r367165
Same kind of fix as in r367176, but for "RUN on line 76"
this time.

I'll ask for a post-commit review, to ensure this
matches the intention with the test added in r367165.
But I think this at least will make the buildbots a
little bit happier.

llvm-svn: 367182
2019-07-27 20:22:47 +00:00
Simon Pilgrim
76f2f04d9d [DAGCombine] narrowInsertExtractVectorBinOp - early out for illegal op. NFCI.
If the subvector binop is illegal then early-out and avoid the subvector searches.

llvm-svn: 367181
2019-07-27 19:42:58 +00:00
Joerg Sonnenberger
791951bd32 Stricter check for the memory access.
The current pattern would trigger for scheduling changes of the
post-load computation, since those are commutable with the inline asm.
Avoid this by explicitly check the order of load vs asm block.

llvm-svn: 367180
2019-07-27 18:57:59 +00:00
Simon Pilgrim
37a32f3c96 Regenerate UXTB tests
llvm-svn: 367179
2019-07-27 18:44:15 +00:00
Bjorn Pettersson
f0f63cab7f [clangd] Fix NDEBUG build problem introduced by rL366698
Sprinkled some #ifndef NDEBUG in Selection.cpp to make
it possible to build with NDEBUG defined.

The problem was introduced in rL366698 when using dlog
for some debug printouts. The dlog macro expands to
DEBUG_WITH_TYPE, which isn't using it's arguments in
optimized builds (when NDEBUG is defined).

llvm-svn: 367178
2019-07-27 17:09:15 +00:00
Bjorn Pettersson
60c1ee23ff [Driver] Fix "unannotated fall-through between switch labels". NFC
Just a simple fix of Werror problem after r367165.

llvm-svn: 367177
2019-07-27 17:09:08 +00:00
Nico Weber
464cb6c8c8 Attempt to make test in r367165 more robust.
Some people were seeing this failure:

```
: 'RUN: at line 83';   clang -mrelax-all -fno-integrated-as /b/s/w/ir/k/llvm-project/clang/test/Driver/as-options.s -S 2>&1 \
         | /FileCheck --check-prefix=WARN --allow-empty clang/test/Driver/as-options.s
--
Exit Code: 1

Command Output (stderr):
--
clang/test/Driver/as-options.s:66:16: error: NOWARN-NOT: excluded string found in input
// NOWARN-NOT: unused
               ^
<stdin>:1:95: note: found here
clang-10: warning: clang/test/Driver/as-options.s: 'assembler' input unused [-Wunused-command-line-argument]
```

Maybe this helps with that.

llvm-svn: 367176
2019-07-27 16:57:19 +00:00
Simon Pilgrim
062cd8bb1d [AMDGPU] Regenerate tests.
To help show the diffs from an upcoming SimplifyDemandedBits patch.

llvm-svn: 367175
2019-07-27 14:32:23 +00:00
Simon Pilgrim
603f94aa2a [TargetLowering] SimplifyMultipleUseDemandedBits - add BITCAST pass through support (Reapplied)
This allows us to peek through BITCASTs, attempt to simplify the source operand, and then bitcast back.

This reapplies rL367091 which was reverted at rL367118 - we were inconsistently peeking through the bitcasts to the source value.

Fixes PR42777

llvm-svn: 367174
2019-07-27 14:11:59 +00:00
Sanjay Patel
02b9e45a7e [InstSimplify] remove quadratic time looping (PR42771)
The test case from:
https://bugs.llvm.org/show_bug.cgi?id=42771
...shows a ~30x slowdown caused by the awkward loop iteration (rL207302) that is
seemingly done just to avoid invalidating the instruction iterator. We can instead
delay instruction deletion until we reach the end of the block (or we could delay
until we reach the end of all blocks).

There's a test diff here for a degenerate case with llvm.assume that is not
meaningful in itself, but serves to verify this change in logic.

This change probably doesn't result in much overall compile-time improvement
because we call '-instsimplify' as a standalone pass only once in the standard
-O2 opt pipeline currently.

Differential Revision: https://reviews.llvm.org/D65336

llvm-svn: 367173
2019-07-27 14:05:51 +00:00
Simon Pilgrim
353a848473 [X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler (Reapplied)
Recommit rL367100 which was reverted at rL367141. Until PR42777 is fixed, we no longer get the benefits of peeking through bitcasts but it does still remove a GetDemandedBits user and gives us the equivalent combines.

llvm-svn: 367172
2019-07-27 13:30:29 +00:00
Simon Pilgrim
8a52671782 [SelectionDAG] Check for any recursion depth greater than or equal to limit instead of just equal the limit.
If anything called the recursive isKnownNeverNaN/computeKnownBits/ComputeNumSignBits/SimplifyDemandedBits/SimplifyMultipleUseDemandedBits with an incorrect depth then we could continue to recurse if we'd already exceeded the depth limit.

This replaces the limit check (Depth == 6) with a (Depth >= 6) to make sure that we don't circumvent it. 

This causes a couple of regressions as a mixture of calls (SimplifyMultipleUseDemandedBits + combineX86ShufflesRecursively) were calling with depths that were already over the limit. I've fixed SimplifyMultipleUseDemandedBits to not do this. combineX86ShufflesRecursively is trickier as we get a lot of regressions if we reduce its own limit from 8 to 6 (it also starts at Depth == 1 instead of Depth == 0 like the others....) - I'll see what I can do in future patches.

llvm-svn: 367171
2019-07-27 12:48:46 +00:00
Alexander Richardson
51bfb84852 [compiler-rt] Fix running tests on macOS when XCode is not installed
Summary:
If XCode is not installed, `xcodebuild -version -sdk macosx Path` will give
xcode-select: error: tool 'xcodebuild' requires Xcode, but active developer directory '/Library/Developer/CommandLineTools' is a command line tools instance
In this case the variable OSX_SYSROOT will be empty and
OSX_SYSROOT_FLAG is set to "-isysroot" (without a path).
This then causes the CompilerRTUnitTestCheckCxx target failed to for me
because "${COMPILER_RT_TEST_COMPILER} ${OSX_SYSROOT_FLAG} -E" expanded to
"clang -isysroot -E". This results in a warning "sysroot -E does not exist"
and the target fails to run because the C++ headers cannot be found.

Reviewers: beanz, kubamracek

Reviewed By: beanz

Subscribers: dberris, mgorny, #sanitizers, llvm-commits

Tags: #sanitizers, #llvm

Differential Revision: https://reviews.llvm.org/D65323

llvm-svn: 367170
2019-07-27 12:30:15 +00:00
Simon Pilgrim
3ff6126487 [TargetLowering] Add depth limit to SimplifyMultipleUseDemandedBits
We're getting reports of massive compile time increases because SimplifyMultipleUseDemandedBits was losing track of the depth and not earlying-out. No repro yet, but consider this a pre-emptive commit.

llvm-svn: 367169
2019-07-27 12:23:36 +00:00
Simon Atanasyan
6faac434ed [mips] Add (dis)assembler tests for beqzl and bnezl instructions. NFC
llvm-svn: 367168
2019-07-27 08:13:27 +00:00
Nico Weber
1361a4c2d8 clang-format: Support if CONSTEXPR if CONSTEXPR is a macro.
This is like r305666 (which added support for `if constexpr`) except
that it allows a macro name after the if.

This is slightly tricky for two reasons:

1. r305666 didn't add test coverage for all cases where it added a
   kw_constexpr, so I had to figure out what all the added cases were
   for. I now added tests for all `if constexpr` bits that didn't have
   tests. (This took a while, see e.g. https://reviews.llvm.org/D65223)

2. Parsing `if <ident> (` as an if means that `#if defined(` and
   `#if __has_include(` parse as ifs too. Add some special-case code
   to prevent this from happening where it's incorrect.

Fixes PR39248.

Differential Revision: https://reviews.llvm.org/D65227

llvm-svn: 367167
2019-07-27 02:41:40 +00:00
Petr Hosek
92a2e1bbb9 Revert "[ARM] Set default alignment to 64bits"
This reverts commit r367119.

This broke several bots:

http://lab.llvm.org:8011/builders/clang-atom-d525-fedora-rel/builds/26891/steps/ninja%20check%201/logs/FAIL%3A%20Clang%3A%3Aexception-alignment.cpp
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/245/consoleFull

llvm-svn: 367166
2019-07-27 01:59:23 +00:00
Nico Weber
b28ffd8f35 driver: Don't warn about assembler flags being unused when not assembling; different approach
This morally relands r365703 (and r365714), originally reviewed at
https://reviews.llvm.org/D64527, but with a different implementation.

Relanding the same approach with a fix for the revert reason got a bit
involved (see https://reviews.llvm.org/D65108) so use a simpler approach
with a more localized implementation (that in return duplicates code
a bit more).

This approach also doesn't validate flags for the integrated assembler
if the assembler step doesn't run.

Fixes PR42066.

Differential Revision: https://reviews.llvm.org/D65233

llvm-svn: 367165
2019-07-27 01:13:00 +00:00
Amara Emerson
7bc4fad0fb [AArch64][GlobalISel] Implement narrowing of G_SEXT.
We need this to narrow a sext to s128.

Differential Revision: https://reviews.llvm.org/D65357

llvm-svn: 367164
2019-07-26 23:46:38 +00:00
Jessica Paquette
aa8b9993c2 [AArch64][GlobalISel] Select @llvm.aarch64.stlxr for 32-bit pointers
Add partial instruction selection for intrinsics like this:

```
declare i32 @llvm.aarch64.stlxr(i64, i32*)
```

(This only handles the case where a G_ZEXT is feeding the intrinsic.)

Also make sure that the added store instruction actually has the memory op from
the original G_STORE.

Update select-stlxr-intrin.mir and arm64-ldxr-stxr.ll.

Differential Revision: https://reviews.llvm.org/D65355

llvm-svn: 367163
2019-07-26 23:28:53 +00:00
Francis Visoiu Mistrih
f5a338369b [Remarks] Silence Wreturn-type warning
Shows up here: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fuzzer/builds/27771/steps/annotate/logs/stdio.

llvm-svn: 367162
2019-07-26 22:42:54 +00:00
Francis Visoiu Mistrih
ec63dc2c35 [Remarks] Update unit test to use StringRef::lower
llvm-svn: 367161
2019-07-26 22:36:20 +00:00