Commit Graph

289669 Commits

Author SHA1 Message Date
David Bolvansky
ca22d427b9 [SimplifyLibcalls] Replace locked IO with unlocked IO
Summary: If file stream arg is not captured and source is fopen, we could replace IO calls by unlocked IO ("_unlocked" function variants) to gain better speed,

Reviewers: efriedma, RKSimon, spatel, sanjoy, hfinkel, majnemer, lebedev.ri, rja

Reviewed By: rja

Subscribers: rja, srhines, efriedma, lebedev.ri, llvm-commits

Differential Revision: https://reviews.llvm.org/D45736

llvm-svn: 332452
2018-05-16 11:39:52 +00:00
Simon Pilgrim
5647e89f5a [X86] Split WriteCvtI2F/WriteCvtF2I into I<->F32 and I<->F64 scheduler classes
A lot of the models still have too many InstRW overrides for these new classes - this needs cleaning up but I wanted to get the classes in first

llvm-svn: 332451
2018-05-16 10:53:45 +00:00
David Green
cdee1d957e [LoopUnroll] Split out simplify code after Unroll into a new function. NFC
So that it can be shared with other passes that may end up doing the same
thing.

Differential Revision: https://reviews.llvm.org/D45874

llvm-svn: 332450
2018-05-16 10:41:58 +00:00
Amara Emerson
0d6a26dffc [GlobalISel][IRTranslator] Split aggregates during IR translation.
We currently handle all aggregates by creating one large LLT, and letting the
legalizer deal with splitting them up. However using this approach means that
we can't support big endian code correctly.

This patch changes the way that the IRTranslator deals with aggregate values,
by splitting them up into their constituent element values. To do this, parts
of the translator need to be modified to deal with multiple VRegs for a single
Value.

A new Value to VReg mapper is introduced to help keep compile time under
control, currently there is no measurable impact on CTMark despite the extra
code being generated in some cases.

Patch is based on the original work of Tim Northover.

Differential Revision: https://reviews.llvm.org/D46018

llvm-svn: 332449
2018-05-16 10:32:02 +00:00
Jonas Devlieghere
b48447a1d6 [diagtool] Add diagtool to install target.
Although not very well known, diagtool is an incredibly convenient
utility for dealing with diagnostics.
Particularly useful are the "tree" and "show-enabled" commands:

 - The former prints the hierarchy of diagnostic (warning) flags and
   which of them are enabled by default.
 - The latter can be used to replace an invocation to clang and will
   print which diagnostics are disabled, warnings or errors.
   For instance: `diagtool show-enabled -Wall -Werror /tmp/test.c` will
   print that -Wunused-variable (warn_unused_variable) will be treated as
   an error.

This patch adds them to the install target so it gets shipped with the
LLVM release. It also adds a very basic man page and mentions this
change in the release notes.

Differential revision: https://reviews.llvm.org/D46694

llvm-svn: 332448
2018-05-16 10:23:25 +00:00
Andrea Di Biagio
45ccdd1785 [llvm-mca] Regenerate tests after r332381 and r332361. NFC
llvm-svn: 332447
2018-05-16 10:12:06 +00:00
Simon Dardis
5cf9de4b72 [mips] Add support for isBranchOffsetInRange and use it for MipsLongBranch
Add support for this target hook, covering MIPS, microMIPS and MIPSR6, along
with some tests. Also add missing getOppositeBranchOpc() cases exposed by the
tests.

Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D46794

llvm-svn: 332446
2018-05-16 10:03:05 +00:00
Clement Courbet
caa163ef6a [llvm-exegesis] Add a flag to output analysis csv to a file.
Reviewers: gchatelet

Subscribers: llvm-commits, tschuett

Differential Revision: https://reviews.llvm.org/D46931

llvm-svn: 332445
2018-05-16 09:50:04 +00:00
Peter Smith
c811758da6 [AArch64] Support "S" inline assembler constraint
This patch re-introduces the "S" inline assembler constraint. This matches
an absolute symbolic address or a label reference. The primary use case is

asm("adrp %0, %1\n\t"
    "add %0, %0, :lo12:%1" : "=r"(addr) : "S"(&var));

I say re-introduces as it seems like "S" was implemented in the original
AArch64 backend, but it looks like it wasn't carried forward to the merged
backend. The original implementation had A and L modifiers that could be
used to print ":lo12:" to the string. It looks like gcc doesn't use these
and :lo12: is expected to be written in the inline assembly string so I've
not implemented A and L. Clang already supports the S modifier.

Fixes PR37180

Differential Revision: https://reviews.llvm.org/D46745

llvm-svn: 332444
2018-05-16 09:33:25 +00:00
Andrea Di Biagio
ca0d30cd81 [llvm-mca] Remove redundant includes in Stage.h.
This patch also makes Stage::isReady() a const method.

No functional change.

llvm-svn: 332443
2018-05-16 09:24:38 +00:00
Sander de Smalen
a680f558be [AArch64][SVE] Asm: Support for structured LD2, LD3 and LD4 (scalar+scalar) load instructions.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D46679

llvm-svn: 332442
2018-05-16 09:16:20 +00:00
Clement Courbet
4022b6c42f Fix unused variable warning in r332437.
llvm-svn: 332441
2018-05-16 09:10:04 +00:00
Alexander Richardson
1bffd0f741 Escape ]]> in xunit xml output
Summary:
This sequence ends the CDATA block so any characters after that are no
longer escaped. This can be fixed by replacing "]]>" with "]]]]><![CDATA[>".

Reviewers: cmatthews

Reviewed By: cmatthews

Differential Revision: https://reviews.llvm.org/D46886

llvm-svn: 332440
2018-05-16 09:00:28 +00:00
Alexander Richardson
8f44579d0b Emit a left-shift instead of a power-of-two multiply for jump-tables
Summary:
SelectionDAGLegalize::ExpandNode() inserts an ISD::MUL when lowering a
BR_JT opcode. While many backends optimize this multiply into a shift, e.g.
the MIPS backend currently always lowers this into a sequence of
load-immediate+multiply+mflo in MipsSETargetLowering::lowerMulDiv().

I initially changed the multiply to a shift in the MIPS backend but it
turns out that would not have handled the MIPSR6 case and was a lot more
code than doing it in LegalizeDAG.
I believe performing this simple optimization in LegalizeDAG instead of
each individual backend is the better solution since this also fixes other
backeds such as MSP430 which calls the multiply runtime function
__mspabi_mpyi without this patch.

Reviewers: sdardis, atanasyan, pftbest, asl

Reviewed By: sdardis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45760

llvm-svn: 332439
2018-05-16 08:58:26 +00:00
Heejin Ahn
85e38ee18e [clangd] Fix a link failure in unittests
Summary: D46524 (rL332378) introduced a link failure when built with
`-DSHARED_LIB=ON`, which this patch fixes.

Reviewers: ioeric

Subscribers: klimek, mgorny, ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D46906

llvm-svn: 332438
2018-05-16 08:53:57 +00:00
Clement Courbet
6d6c1a99d7 [llvm-exegesis] Analysis: Display sched class for instructions.
Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D46883

llvm-svn: 332437
2018-05-16 08:47:21 +00:00
Francois Ferrand
58e6fe5b54 clang-format: Allow optimizer to break template declaration.
Summary:
Introduce `PenaltyBreakTemplateDeclaration` to control the penalty,
and change `AlwaysBreakTemplateDeclarations` to an enum with 3 modes:
* `No` for regular, penalty based, wrapping of template declaration
* `MultiLine` for always wrapping before multi-line declarations (e.g.
  same as legacy behavior when `AlwaysBreakTemplateDeclarations=false`)
* `Yes` for always wrapping (e.g. same as legacy behavior when
  `AlwaysBreakTemplateDeclarations=true`)

Reviewers: krasimir, djasper, klimek

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42684

llvm-svn: 332436
2018-05-16 08:25:03 +00:00
Simon Pilgrim
5df1ef7a8c [X86][SSE] Fix tests for vector rotates by splat variable.
We weren't correctly splatting the offset shift

llvm-svn: 332435
2018-05-16 08:23:47 +00:00
Francois Ferrand
f92f806aa4 clang-format: tweak formatting of variable initialization blocks
Summary:
This patch changes the behavior of PenaltyBreakBeforeFirstCallParameter
so that is does not apply after a brace, when Cpp11BracedListStyle is
false.

This way, variable initialization is wrapped more like an initializer
than like a function call, which is more consistent with user
expectations for this braced list style.

With PenaltyBreakBeforeFirstCallParameter=200, this gives the following
code: (with Cpp11BracedListStyle=false)

Before :

  const std::unordered_map<std::string, int> Something::MyHashTable =
      { { "aaaaaaaaaaaaaaaaaaaaa", 0 },
        { "bbbbbbbbbbbbbbbbbbbbb", 1 },
        { "ccccccccccccccccccccc", 2 } };

After :

  const std::unordered_set<std::string> Something::MyUnorderedSet = {
    { "aaaaaaaaaaaaaaaaaaaaa", 0 },
    { "bbbbbbbbbbbbbbbbbbbbb", 1 },
    { "ccccccccccccccccccccc", 2 }
  };

Reviewers: krasimir, djasper, klimek

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D43290

llvm-svn: 332434
2018-05-16 08:03:52 +00:00
Sander de Smalen
67f9154964 [AArch64][SVE] Asm: Support for contiguous PRF prefetch instructions.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D46682

llvm-svn: 332433
2018-05-16 07:50:09 +00:00
Fangrui Song
2cafed76d3 [Unix] Indent ChangeStd{in,out}ToBinary.
llvm-svn: 332432
2018-05-16 06:43:27 +00:00
Mikael Holmen
e01131decf Remove unused variable introduced in r332336
The unused variable caused a compilation warning:

../lib/Target/X86/X86ISelLowering.cpp:34614:17: error: unused variable 'SMax' [-Werror,-Wunused-variable]
    if (SDValue SMax = MatchMinMax(SMin, ISD::SMAX, C1))
                ^
1 error generated.

llvm-svn: 332431
2018-05-16 06:36:11 +00:00
Shoaib Meenai
074728a2a9 [ObjCARC] Prevent code motion into a catchswitch
A catchswitch must be the only non-phi instruction in its basic block;
attempting to move a retain or release into a catchswitch basic block
will result in invalid IR. Explicitly mark a CFG hazard in this case to
prevent the code motion.

Differential Revision: https://reviews.llvm.org/D46482

llvm-svn: 332430
2018-05-16 04:52:18 +00:00
JF Bastien
b8931c1cf4 Revert "Signal handling should be signal-safe"
Some bots don't have double-pointer width compare-and-exchange. Revert for now.q

llvm-svn: 332429
2018-05-16 04:36:37 +00:00
JF Bastien
253aa8b099 Signal handling should be signal-safe
Summary:
Before this patch, signal handling wasn't signal safe. This leads to real-world
crashes. It used ManagedStatic inside of signals, this can allocate and can lead
to unexpected state when a signal occurs during llvm_shutdown (because
llvm_shutdown destroys the ManagedStatic). It also used cl::opt without custom
backing storage. Some de-allocation was performed as well. Acquiring a lock in a
signal handler is also a great way to deadlock.

We can't just disable signals on llvm_shutdown because the signals might do
useful work during that shutdown. We also can't just disable llvm_shutdown for
programs (instead of library uses of clang) because we'd have to then mark the
pointers as not leaked and make sure all the ManagedStatic uses are OK to leak
and remain so.

Move all of the code to lock-free datastructures instead, and avoid having any
of them in an inconsistent state. I'm not trying to be fancy, I'm not using any
explicit memory order because this code isn't hot. The only purpose of the
atomics is to guarantee that a signal firing on the same or a different thread
doesn't see an inconsistent state and crash. In some cases we might miss some
state (for example, we might fail to delete a temporary file), but that's fine.

Note that I haven't touched any of the backtrace support despite it not
technically being totally signal-safe. When that code is called we know
something bad is up and we don't expect to continue execution, so calling
something that e.g. sets errno is the least of our problems.

A similar patch should be applied to lib/Support/Windows/Signals.inc, but that
can be done separately.

<rdar://problem/28010281>

Reviewers: dexonsmith

Subscribers: aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D46858

llvm-svn: 332428
2018-05-16 04:30:00 +00:00
Shiva Chen
21eab936d5 [DebugInfo] Only handle DBG_VALUE in InlineSpiller.
The instructions using registers should be DBG_VALUE and normal
instructions. Use isDebugValue() to filter out DBG_VALUE and add
an assert to ensure there is no other kind of debug instructions
using the registers.

Differential Revision: https://reviews.llvm.org/D46739

Patch by Hsiangkai Wang.

llvm-svn: 332427
2018-05-16 02:57:26 +00:00
Evgeny Stupachenko
bff9302c3d Fix LSR compile time hang.
Summary:
Limit number of reassociations in GenerateReassociationsImpl.

Reviewers: qcolombet, mkazantsev

Differential Revision: https://reviews.llvm.org/D46039

From: Evgeny Stupachenko <evstupac@gmail.com>
                         <evgeny.v.stupachenko@intel.com>
llvm-svn: 332426
2018-05-16 02:48:50 +00:00
Richard Smith
5412b21d24 Fix 32-bit buildbots.
llvm-svn: 332425
2018-05-16 01:08:07 +00:00
Chris Matthews
48357c43d5 remove output xml incase it is leftover from another run
llvm-svn: 332424
2018-05-16 00:37:00 +00:00
Chris Matthews
5d1014bff5 Use not to catch unexpected pass as well as remove old test results
As per review feedback, make sure we rm temp files, and make the return
code checking for lit more specific.

llvm-svn: 332423
2018-05-16 00:33:29 +00:00
George Karpenkov
faa03f4aca [analyzer] Do not crash on callback for call_once passed by value
https://bugs.llvm.org/show_bug.cgi?id=37312
rdar://40270582

Differential Revision: https://reviews.llvm.org/D46913

llvm-svn: 332422
2018-05-16 00:29:13 +00:00
Douglas Yung
9a40ff502f Revert commits r332160, r332164, r332236.
It was decided this is the wrong approach to fix this issue.

llvm-svn: 332421
2018-05-16 00:27:43 +00:00
Peter Collingbourne
ec8236ead1 ARM: Remove unnecessary argument. NFCI.
IsLittleEndian is already a field of ARMAsmBackend.

llvm-svn: 332420
2018-05-16 00:21:47 +00:00
Peter Collingbourne
76d463af0a ARM: Deduplicate code and remove unnecessary declaration. NFCI.
llvm-svn: 332419
2018-05-16 00:21:31 +00:00
Anastasis Grammenos
66f13e0ba2 [Debugify] Fix test failing after r332416
I missed a test that needed an update.

Failing bot: http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/30071

llvm-svn: 332418
2018-05-16 00:11:52 +00:00
Artem Dergachev
21948346b3 [analyzer] Make plist-html diagnostic consumer produce multi-file reports.
Previously plist-html output produced multi-file HTML reports
but only single-file Plist reports.

Change plist-html output to produce multi-file Plist reports as well.

Differential Revision: https://reviews.llvm.org/D46902

llvm-svn: 332417
2018-05-16 00:11:24 +00:00
Anastasis Grammenos
b4344c66aa [Debugfiy] Print the pass name next to the result
CheckDebugify now prints the pass name right next to the result of the check.

Differential Revision: https://reviews.llvm.org/D46908

llvm-svn: 332416
2018-05-15 23:38:05 +00:00
Eli Friedman
25bef201c5 [MachineOutliner] Add optsize markings to outlined functions.
It doesn't matter much this late in the pipeline, but one place that
does check for it is the function alignment code.

Differential Revision: https://reviews.llvm.org/D46373

llvm-svn: 332415
2018-05-15 23:36:46 +00:00
John Baldwin
c3f240f7dc [libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.
Summary:
For MIPS ABIs with 64-bit floating point registers including newabi
and O32 with 64-bit floating point registers, just save and restore the
32 floating-point registers as doubles.

For O32 MIPS with 32-bit floating-point registers, save and restore the
individual floating-point registers as "plain" registers.  These registers
are encoded as floats rather than doubles, but the DWARF unwinder
assumes that floating-point registers are stored as doubles when reading
them from memory (via AddressSpace::getDouble()).  Treating the
registers as "normal" registers instead causes the DWARF unwinder to
fetch them from memory as a 32-bit register.  This does mean that for
O32 with 32-bit floating-point registers unw_get_fpreg() and
unw_set_fpreg() do not work.  One would have to use unw_get_reg()
and unw_set_reg() instead.  However, DWARF unwinding works
correctly as the DWARF CFI emits records for individual 32-bit
floating-point registers even when they are treated as doubles stored
in paired registers.  If the lack of unw_get/set_fpreg() becomes a pressing
need in the future for O32 MIPS we could add in special handling to
make it work.

Reviewers: sdardis, compnerd

Reviewed By: sdardis

Differential Revision: https://reviews.llvm.org/D41968

llvm-svn: 332414
2018-05-15 22:44:56 +00:00
Volodymyr Sapsai
85d3a702da Emit an error when include <atomic> after <stdatomic.h>
C11 defines `kill_dependency` as a macro in <stdatomic.h>. When you
include <atomic> after <stdatomic.h>, the macro clashes with
`std::kill_dependency` and causes multiple errors. Explicit error should
help in diagnosing those errors.

No change for working code that includes <atomic> before <stdatomic.h>.

rdar://problem/27435938

Reviewers: rsmith, EricWF, mclow.lists, jfb

Reviewed By: jfb

Subscribers: jfb, jkorous-apple, christof, bumblebritches57, JonChesterfield, smeenai, cfe-commits

Differential Revision: https://reviews.llvm.org/D45470

llvm-svn: 332413
2018-05-15 22:38:31 +00:00
Sam Clegg
cfeb646f80 [WebAssembly] Fix R_WEBASSEMBLY_FUNCTION_OFFSET_I32 relocation entries
Fixes: lld: warning: unexpected existing value for R_WEBASSEMBLY_FUNCTION_OFFSET_I32: existing=839 expected=838

The existing solution is trying to erroneously recover correct offset of
the function code from the body (which is not a function segment that
includes its size, locals, and code).

The D46763 is trying to maintain the offset of the function code
allowing properly calculate the new relocation entry.

Patch by Yury Delendik

Differential Revision: https://reviews.llvm.org/D46765

llvm-svn: 332412
2018-05-15 22:27:50 +00:00
Joel E. Denny
9454864886 [Attr] Don't print implicit attributes
Fixes bug reported at:

http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20180514/228390.html

Reviewed by: aaron.ballman

Differential Revision: https://reviews.llvm.org/D46894

llvm-svn: 332411
2018-05-15 22:16:47 +00:00
Simon Pilgrim
de13589625 [X86][SSE] Add tests for vector rotates by splat variable.
llvm-svn: 332410
2018-05-15 22:11:51 +00:00
Stanislav Mekhanoshin
57d341c27a [AMDGPU] Fix handling of void types in isLegalAddressingMode
It is legal for the type passed to isLegalAddressingMode to be
unsized or, more specifically, VoidTy. In this case, we must
check the legality of load / stores for all legal types. Directly
trying to call getTypeStoreSize is incorrect, and leads to breakage
in e.g. Loop Strength Reduction. This change guards against that
behaviour.

Differential Revision: https://reviews.llvm.org/D40405

llvm-svn: 332409
2018-05-15 22:07:51 +00:00
Benjamin Kramer
5455038d98 [lld] Make helpers static. NFC.
llvm-svn: 332408
2018-05-15 22:01:54 +00:00
Sanjay Patel
919882638e [InstCombine] fix binop (shuffle X), C --> shuffle (binop X, C') to check uses
llvm-svn: 332407
2018-05-15 22:00:37 +00:00
Sam Clegg
1be4bf9abc [WebAssembly] Provide WasmFunction content offset information.
WasmObjectWriter mostly operates with function segments offsets that do
not include their size fields. WasmObjectFile needs to have and provide
this information to the lld to maintain proper
R_WEBASSEMBLY_FUNCTION_OFFSET_I32 relocations entries.

Patch by Yury Delendik

Differential Revision: https://reviews.llvm.org/D46763

llvm-svn: 332406
2018-05-15 21:49:58 +00:00
Eugene Zelenko
ad5684aae0 [Documentation] Fix Release Notes format issues.
llvm-svn: 332405
2018-05-15 21:45:01 +00:00
Marek Olsak
37b9f55cc6 AMDGPU: Add a missing test for the 128-bit local addr space option
This should have been pushed with:
  "AMDGPU: enable 128-bit for local addr space under an option"

llvm-svn: 332404
2018-05-15 21:41:57 +00:00
Marek Olsak
3c5fd145c5 StructurizeCFG: fix inverting conditions
Author: Samuel Pitoiset

Without this patch, it appears to me that we are selecting
the wrong operand when inverting conditions. In the attached
test, it will select %tmp3 instead of %tmp4. To fix it, just
use 'A' as everywhere.

This fixes a regression introduced by
"[PatternMatch] define m_Not using m_Xor and cst_pred_ty"

https://reviews.llvm.org/D46351

llvm-svn: 332403
2018-05-15 21:41:55 +00:00