3f8027fb67
This updates transform test cases for ADCE AddDiscriminators AggressiveInstCombine AlignmentFromAssumptions ArgumentPromotion BDCE CalledValuePropagation DCE Reg2Mem WholeProgramDevirt to use the -passes syntax when specifying the pipeline. Given that LLVM_ENABLE_NEW_PASS_MANAGER isn't set to off (which is a deprecated feature) the updated test cases already used the new pass manager, but they were using the legacy syntax when specifying the passes to run. This patch can be seen as a step toward deprecating that interface. This patch also removes some redundant RUN lines. Here I am referring to test cases that had multiple RUN lines verifying both the legacy "-passname" syntax and the new "-passes=passname" syntax. Since we switched the default pass manager to "new PM" both RUN lines have verified the new PM version of the pass (more or less wasting time running the same test twice), unless LLVM_ENABLE_NEW_PASS_MANAGER is set to "off". It is assumed that it is enough to run these tests with the new pass manager now. Differential Revision: https://reviews.llvm.org/D108472
143 lines
4.8 KiB
LLVM
143 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; Aggressive Instcombine should be able to reduce width of these constant
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; expressions, without crashing.
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declare i32 @use32(i32)
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declare <2 x i32> @use32_vec(<2 x i32>)
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declare <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32>)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; These tests check cases where expression dag post-dominated by TruncInst
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;; contains instruction, which has more than one usage.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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define void @const_expression_mul() {
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; CHECK-LABEL: @const_expression_mul(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 242)
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; CHECK-NEXT: ret void
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;
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%A = mul i64 11, 22
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%T = trunc i64 %A to i32
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call i32 @use32(i32 %T)
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ret void
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}
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define void @const_expression_zext() {
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; CHECK-LABEL: @const_expression_zext(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 33)
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; CHECK-NEXT: ret void
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;
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%A = zext i32 33 to i64
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%T = trunc i64 %A to i32
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call i32 @use32(i32 %T)
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ret void
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}
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define void @const_expression_trunc() {
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; CHECK-LABEL: @const_expression_trunc(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 44)
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; CHECK-NEXT: ret void
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;
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%T = trunc i64 44 to i32
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call i32 @use32(i32 %T)
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ret void
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}
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; Check that we handle constant expression trunc instruction, when it is a leaf
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; of other trunc expression pattern:
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; 1. %T1 is the constant expression trunc instruction.
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; 2. %T2->%T1 is the trunc expression pattern we want to reduce.
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define void @const_expression_trunc_leaf() {
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; CHECK-LABEL: @const_expression_trunc_leaf(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 44)
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; CHECK-NEXT: ret void
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;
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%T1 = trunc i64 44 to i48
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%T2 = trunc i48 %T1 to i32
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call i32 @use32(i32 %T2)
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ret void
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}
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; Check that we handle zext instruction, which turns into trunc instruction.
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; Notice that there are two expression patterns below:
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; 1. %T2->%T1
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; 2. %T1`->%A (where %T1` is the reduced node of %T1 into trunc instruction)
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define void @const_expression_zext_to_trunc() {
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; CHECK-LABEL: @const_expression_zext_to_trunc(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 44)
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; CHECK-NEXT: ret void
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;
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%A = add i64 11, 33
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%T1 = zext i64 %A to i128
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%T2 = trunc i128 %T1 to i32
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call i32 @use32(i32 %T2)
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ret void
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}
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define void @const_expression_mul_vec() {
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; CHECK-LABEL: @const_expression_mul_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> <i32 24531, i32 24864>)
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; CHECK-NEXT: ret void
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;
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%A = mul <2 x i64> <i64 111, i64 112>, <i64 221, i64 222>
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%T = trunc <2 x i64> %A to <2 x i32>
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call <2 x i32> @use32_vec(<2 x i32> %T)
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ret void
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}
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define void @const_expression_zext_vec() {
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; CHECK-LABEL: @const_expression_zext_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> <i32 331, i32 332>)
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; CHECK-NEXT: ret void
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;
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%A = zext <2 x i32> <i32 331, i32 332> to <2 x i64>
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%T = trunc <2 x i64> %A to <2 x i32>
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call <2 x i32> @use32_vec(<2 x i32> %T)
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ret void
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}
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define void @const_expression_trunc_vec() {
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; CHECK-LABEL: @const_expression_trunc_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> <i32 551, i32 552>)
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; CHECK-NEXT: ret void
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;
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%T = trunc <2 x i64> <i64 551, i64 552> to <2 x i32>
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call <2 x i32> @use32_vec(<2 x i32> %T)
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ret void
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}
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define void @const_expression_mul_scale_vec() {
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; CHECK-LABEL: @const_expression_mul_scale_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
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; CHECK-NEXT: ret void
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;
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%A = mul <vscale x 2 x i64> zeroinitializer, zeroinitializer
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%T = trunc <vscale x 2 x i64> %A to <vscale x 2 x i32>
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call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
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ret void
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}
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define void @const_expression_zext_scale_vec() {
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; CHECK-LABEL: @const_expression_zext_scale_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
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; CHECK-NEXT: ret void
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;
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%A = zext <vscale x 2 x i32> zeroinitializer to <vscale x 2 x i64>
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%T = trunc <vscale x 2 x i64> %A to <vscale x 2 x i32>
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call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
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ret void
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}
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define void @const_expression_trunc_scale_vec() {
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; CHECK-LABEL: @const_expression_trunc_scale_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
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; CHECK-NEXT: ret void
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;
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%T = trunc <vscale x 2 x i64> zeroinitializer to <vscale x 2 x i32>
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call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
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ret void
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}
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