Weiming Zhao 8f56f88661 Remove hard coded registers in ARM ldrexd and strexd instructions ...

This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.

llvm-svn: 168207

2012-11-16 21:55:34 +00:00

32 KiB

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