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clang-p2996/llvm/test/CodeGen/PowerPC/ctrloop-sh.ll
Chen Zheng b5e1fc19da [PowerPC] don't check CTR clobber in hardware loop insertion pass 
We added a new post-isel CTRLoop pass in D122125. That pass will expand
the hardware loop related intrinsic to CTR loop or normal loop based
on the loop context. So we don't need to conservatively check the CTR
clobber now on the IR level.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D135847
2022-12-04 20:53:49 -05:00

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-m:e-p:32:32-i128:64-n32"
target triple = "powerpc-ellcc-linux"
; Function Attrs: nounwind
define void @foo1(ptr %a, ptr readonly %b, ptr readonly %c) #0 {
; CHECK-LABEL: foo1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: stwu 1, -48(1)
; CHECK-NEXT: stw 24, 16(1) # 4-byte Folded Spill
; CHECK-NEXT: li 6, 2048
; CHECK-NEXT: stw 25, 20(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 26, 24(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 27, 28(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 28, 32(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 29, 36(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 30, 40(1) # 4-byte Folded Spill
; CHECK-NEXT: mtctr 6
; CHECK-NEXT: li 6, 0
; CHECK-NEXT: .LBB0_1: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: lwz 9, 12(5)
; CHECK-NEXT: lwz 10, 8(4)
; CHECK-NEXT: lwz 11, 12(4)
; CHECK-NEXT: subfic 12, 9, 96
; CHECK-NEXT: lwz 7, 4(4)
; CHECK-NEXT: addi 0, 9, -64
; CHECK-NEXT: lwz 8, 0(4)
; CHECK-NEXT: subfic 28, 9, 32
; CHECK-NEXT: cmplwi 9, 64
; CHECK-NEXT: slw 26, 11, 9
; CHECK-NEXT: srw 12, 11, 12
; CHECK-NEXT: slw 25, 10, 0
; CHECK-NEXT: addi 30, 9, -96
; CHECK-NEXT: slw 29, 8, 9
; CHECK-NEXT: or 12, 25, 12
; CHECK-NEXT: srw 25, 7, 28
; CHECK-NEXT: bc 12, 0, .LBB0_3
; CHECK-NEXT: # %bb.2: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 26, 6, 0
; CHECK-NEXT: b .LBB0_3
; CHECK-NEXT: .LBB0_3: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: slw 27, 10, 9
; CHECK-NEXT: or 29, 29, 25
; CHECK-NEXT: srw 25, 11, 28
; CHECK-NEXT: stw 26, 12(3)
; CHECK-NEXT: subfic 26, 9, 64
; CHECK-NEXT: slw 30, 11, 30
; CHECK-NEXT: or 27, 27, 25
; CHECK-NEXT: addi 25, 9, -32
; CHECK-NEXT: or 12, 12, 30
; CHECK-NEXT: subfic 30, 26, 32
; CHECK-NEXT: srw 28, 10, 28
; CHECK-NEXT: slw 30, 10, 30
; CHECK-NEXT: srw 10, 10, 26
; CHECK-NEXT: srw 26, 11, 26
; CHECK-NEXT: slw 24, 11, 0
; CHECK-NEXT: slw 0, 7, 25
; CHECK-NEXT: or 0, 29, 0
; CHECK-NEXT: or 30, 26, 30
; CHECK-NEXT: cmplwi 1, 9, 0
; CHECK-NEXT: slw 9, 7, 9
; CHECK-NEXT: or 10, 0, 10
; CHECK-NEXT: or 0, 30, 28
; CHECK-NEXT: slw 11, 11, 25
; CHECK-NEXT: or 9, 9, 0
; CHECK-NEXT: or 11, 27, 11
; CHECK-NEXT: bc 12, 0, .LBB0_5
; CHECK-NEXT: # %bb.4: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 10, 12, 0
; CHECK-NEXT: ori 9, 24, 0
; CHECK-NEXT: ori 11, 6, 0
; CHECK-NEXT: b .LBB0_5
; CHECK-NEXT: .LBB0_5: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: bc 12, 6, .LBB0_7
; CHECK-NEXT: # %bb.6: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 8, 10, 0
; CHECK-NEXT: ori 7, 9, 0
; CHECK-NEXT: b .LBB0_7
; CHECK-NEXT: .LBB0_7: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: stw 11, 8(3)
; CHECK-NEXT: stw 8, 0(3)
; CHECK-NEXT: stw 7, 4(3)
; CHECK-NEXT: bdnz .LBB0_1
; CHECK-NEXT: # %bb.8: # %for.end
; CHECK-NEXT: lwz 30, 40(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 29, 36(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 28, 32(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 27, 28(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 26, 24(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 25, 20(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 24, 16(1) # 4-byte Folded Reload
; CHECK-NEXT: addi 1, 1, 48
; CHECK-NEXT: blr
entry:
br label %for.body
for.body: ; preds = %for.body, %entry
%i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%0 = load i128, ptr %b, align 16
%1 = load i128, ptr %c, align 16
%shl = shl i128 %0, %1
store i128 %shl, ptr %a, align 16
%inc = add nsw i32 %i.02, 1
%exitcond = icmp eq i32 %inc, 2048
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body
ret void
}
; Function Attrs: nounwind
define void @foo2(ptr %a, ptr readonly %b, ptr readonly %c) #0 {
; CHECK-LABEL: foo2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: stwu 1, -48(1)
; CHECK-NEXT: stw 24, 16(1) # 4-byte Folded Spill
; CHECK-NEXT: li 6, 2048
; CHECK-NEXT: stw 25, 20(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 26, 24(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 27, 28(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 28, 32(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 29, 36(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 30, 40(1) # 4-byte Folded Spill
; CHECK-NEXT: mtctr 6
; CHECK-NEXT: .LBB1_1: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: lwz 8, 12(5)
; CHECK-NEXT: lwz 9, 4(4)
; CHECK-NEXT: lwz 10, 0(4)
; CHECK-NEXT: subfic 11, 8, 96
; CHECK-NEXT: lwz 6, 8(4)
; CHECK-NEXT: addi 12, 8, -64
; CHECK-NEXT: lwz 7, 12(4)
; CHECK-NEXT: subfic 29, 8, 32
; CHECK-NEXT: slw 11, 10, 11
; CHECK-NEXT: srw 25, 9, 12
; CHECK-NEXT: srw 30, 7, 8
; CHECK-NEXT: or 11, 25, 11
; CHECK-NEXT: slw 25, 6, 29
; CHECK-NEXT: srw 27, 9, 8
; CHECK-NEXT: or 30, 30, 25
; CHECK-NEXT: slw 25, 10, 29
; CHECK-NEXT: addi 0, 8, -96
; CHECK-NEXT: cmplwi 8, 64
; CHECK-NEXT: srawi 26, 10, 31
; CHECK-NEXT: or 27, 27, 25
; CHECK-NEXT: sraw 25, 10, 8
; CHECK-NEXT: cmpwi 1, 0, 1
; CHECK-NEXT: sraw 24, 10, 0
; CHECK-NEXT: bc 12, 0, .LBB1_3
; CHECK-NEXT: # %bb.2: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 0, 26, 0
; CHECK-NEXT: b .LBB1_4
; CHECK-NEXT: .LBB1_3: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: addi 0, 25, 0
; CHECK-NEXT: .LBB1_4: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: addi 28, 8, -32
; CHECK-NEXT: stw 0, 0(3)
; CHECK-NEXT: subfic 0, 8, 64
; CHECK-NEXT: subfic 25, 0, 32
; CHECK-NEXT: slw 29, 9, 29
; CHECK-NEXT: srw 25, 9, 25
; CHECK-NEXT: slw 9, 9, 0
; CHECK-NEXT: slw 0, 10, 0
; CHECK-NEXT: bc 12, 4, .LBB1_6
; CHECK-NEXT: # %bb.5: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 11, 24, 0
; CHECK-NEXT: b .LBB1_6
; CHECK-NEXT: .LBB1_6: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: sraw 12, 10, 12
; CHECK-NEXT: sraw 10, 10, 28
; CHECK-NEXT: cmpwi 1, 28, 1
; CHECK-NEXT: srw 28, 6, 28
; CHECK-NEXT: or 0, 0, 25
; CHECK-NEXT: or 30, 30, 28
; CHECK-NEXT: bc 12, 4, .LBB1_7
; CHECK-NEXT: b .LBB1_8
; CHECK-NEXT: .LBB1_7: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: addi 10, 27, 0
; CHECK-NEXT: .LBB1_8: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: cmplwi 1, 8, 0
; CHECK-NEXT: srw 8, 6, 8
; CHECK-NEXT: or 0, 0, 29
; CHECK-NEXT: or 9, 30, 9
; CHECK-NEXT: or 8, 8, 0
; CHECK-NEXT: bc 12, 0, .LBB1_10
; CHECK-NEXT: # %bb.9: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 9, 11, 0
; CHECK-NEXT: ori 8, 12, 0
; CHECK-NEXT: ori 10, 26, 0
; CHECK-NEXT: b .LBB1_10
; CHECK-NEXT: .LBB1_10: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: bc 12, 6, .LBB1_12
; CHECK-NEXT: # %bb.11: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 7, 9, 0
; CHECK-NEXT: ori 6, 8, 0
; CHECK-NEXT: b .LBB1_12
; CHECK-NEXT: .LBB1_12: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: stw 10, 4(3)
; CHECK-NEXT: stw 7, 12(3)
; CHECK-NEXT: stw 6, 8(3)
; CHECK-NEXT: bdnz .LBB1_1
; CHECK-NEXT: # %bb.13: # %for.end
; CHECK-NEXT: lwz 30, 40(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 29, 36(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 28, 32(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 27, 28(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 26, 24(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 25, 20(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 24, 16(1) # 4-byte Folded Reload
; CHECK-NEXT: addi 1, 1, 48
; CHECK-NEXT: blr
entry:
br label %for.body
for.body: ; preds = %for.body, %entry
%i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%0 = load i128, ptr %b, align 16
%1 = load i128, ptr %c, align 16
%shl = ashr i128 %0, %1
store i128 %shl, ptr %a, align 16
%inc = add nsw i32 %i.02, 1
%exitcond = icmp eq i32 %inc, 2048
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body
ret void
}
; Function Attrs: nounwind
define void @foo3(ptr %a, ptr readonly %b, ptr readonly %c) #0 {
; CHECK-LABEL: foo3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: stwu 1, -48(1)
; CHECK-NEXT: stw 24, 16(1) # 4-byte Folded Spill
; CHECK-NEXT: li 6, 2048
; CHECK-NEXT: stw 25, 20(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 26, 24(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 27, 28(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 28, 32(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 29, 36(1) # 4-byte Folded Spill
; CHECK-NEXT: stw 30, 40(1) # 4-byte Folded Spill
; CHECK-NEXT: mtctr 6
; CHECK-NEXT: li 6, 0
; CHECK-NEXT: .LBB2_1: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: lwz 9, 12(5)
; CHECK-NEXT: lwz 10, 4(4)
; CHECK-NEXT: lwz 11, 0(4)
; CHECK-NEXT: subfic 12, 9, 96
; CHECK-NEXT: lwz 7, 8(4)
; CHECK-NEXT: addi 0, 9, -64
; CHECK-NEXT: lwz 8, 12(4)
; CHECK-NEXT: subfic 28, 9, 32
; CHECK-NEXT: cmplwi 9, 64
; CHECK-NEXT: srw 26, 11, 9
; CHECK-NEXT: slw 12, 11, 12
; CHECK-NEXT: srw 25, 10, 0
; CHECK-NEXT: addi 30, 9, -96
; CHECK-NEXT: srw 29, 8, 9
; CHECK-NEXT: or 12, 25, 12
; CHECK-NEXT: slw 25, 7, 28
; CHECK-NEXT: bc 12, 0, .LBB2_3
; CHECK-NEXT: # %bb.2: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 26, 6, 0
; CHECK-NEXT: b .LBB2_3
; CHECK-NEXT: .LBB2_3: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: srw 27, 10, 9
; CHECK-NEXT: or 29, 29, 25
; CHECK-NEXT: slw 25, 11, 28
; CHECK-NEXT: stw 26, 0(3)
; CHECK-NEXT: subfic 26, 9, 64
; CHECK-NEXT: srw 30, 11, 30
; CHECK-NEXT: or 27, 27, 25
; CHECK-NEXT: addi 25, 9, -32
; CHECK-NEXT: or 12, 12, 30
; CHECK-NEXT: subfic 30, 26, 32
; CHECK-NEXT: slw 28, 10, 28
; CHECK-NEXT: srw 30, 10, 30
; CHECK-NEXT: slw 10, 10, 26
; CHECK-NEXT: slw 26, 11, 26
; CHECK-NEXT: srw 24, 11, 0
; CHECK-NEXT: srw 0, 7, 25
; CHECK-NEXT: or 0, 29, 0
; CHECK-NEXT: or 30, 26, 30
; CHECK-NEXT: cmplwi 1, 9, 0
; CHECK-NEXT: srw 9, 7, 9
; CHECK-NEXT: or 10, 0, 10
; CHECK-NEXT: or 0, 30, 28
; CHECK-NEXT: srw 11, 11, 25
; CHECK-NEXT: or 9, 9, 0
; CHECK-NEXT: or 11, 27, 11
; CHECK-NEXT: bc 12, 0, .LBB2_5
; CHECK-NEXT: # %bb.4: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 10, 12, 0
; CHECK-NEXT: ori 9, 24, 0
; CHECK-NEXT: ori 11, 6, 0
; CHECK-NEXT: b .LBB2_5
; CHECK-NEXT: .LBB2_5: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: bc 12, 6, .LBB2_7
; CHECK-NEXT: # %bb.6: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: ori 8, 10, 0
; CHECK-NEXT: ori 7, 9, 0
; CHECK-NEXT: b .LBB2_7
; CHECK-NEXT: .LBB2_7: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: stw 11, 4(3)
; CHECK-NEXT: stw 8, 12(3)
; CHECK-NEXT: stw 7, 8(3)
; CHECK-NEXT: bdnz .LBB2_1
; CHECK-NEXT: # %bb.8: # %for.end
; CHECK-NEXT: lwz 30, 40(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 29, 36(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 28, 32(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 27, 28(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 26, 24(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 25, 20(1) # 4-byte Folded Reload
; CHECK-NEXT: lwz 24, 16(1) # 4-byte Folded Reload
; CHECK-NEXT: addi 1, 1, 48
; CHECK-NEXT: blr
entry:
br label %for.body
for.body: ; preds = %for.body, %entry
%i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%0 = load i128, ptr %b, align 16
%1 = load i128, ptr %c, align 16
%shl = lshr i128 %0, %1
store i128 %shl, ptr %a, align 16
%inc = add nsw i32 %i.02, 1
%exitcond = icmp eq i32 %inc, 2048
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body
ret void
}
attributes #0 = { nounwind }
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