Files
clang-p2996/llvm/lib/CodeGen/MachinePipeliner.cpp
Ryotaro KASUGA 1745c8e08d [MachinePipeliner] Fix instruction order with physical register (#99264)
dependencies in same cycle

Dependency checks were insufficient when reordering instructions with
physical register dependencies (i.e. Anti/Output dependencies). This
could result in generating incorrect code.
2024-08-06 13:46:10 +09:00

134 KiB