Tim Northover 063a56e81c ARM: make sure FastISel bails on f64 operations for Cortex-M4. ...

FastISel wasn't checking the isFPOnlySP subtarget feature before emitting
double-precision operations, so it got completely invalid CodeGen for doubles
on Cortex-M4F.

The normal ISel testing wasn't spectacular either so I added a second RUN line
to improve that while I was in the area.

llvm-svn: 296031

2017-02-23 22:35:00 +00:00

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