Files
clang-p2996/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimizationForImmediate.def
Shengchen Kan 3f1e9468f6 [X86][MC][bolt] Share code between encoding optimization and assembler relaxation, NFCI
PUSH[16|32|64]i[8|32] are not arithmetic instructions, so I renamed the
functions.

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D151028
2023-05-21 09:31:50 +08:00

73 lines
2.0 KiB
C++

//===- X86EncodingOptimizationForImmediate.def.def ---------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// \file
// This file defines all the entries of X86 instruction relaxation for immediate
//===----------------------------------------------------------------------===//
#ifndef ENTRY
#define ENTRY(LONG, SHORT)
#endif
ENTRY(ADC16mi, ADC16mi8)
ENTRY(ADC16ri, ADC16ri8)
ENTRY(ADC32mi, ADC32mi8)
ENTRY(ADC32ri, ADC32ri8)
ENTRY(ADC64mi32, ADC64mi8)
ENTRY(ADC64ri32, ADC64ri8)
ENTRY(SBB16mi, SBB16mi8)
ENTRY(SBB16ri, SBB16ri8)
ENTRY(SBB32mi, SBB32mi8)
ENTRY(SBB32ri, SBB32ri8)
ENTRY(SBB64mi32, SBB64mi8)
ENTRY(SBB64ri32, SBB64ri8)
ENTRY(ADD16mi, ADD16mi8)
ENTRY(ADD16ri, ADD16ri8)
ENTRY(ADD32mi, ADD32mi8)
ENTRY(ADD32ri, ADD32ri8)
ENTRY(ADD64mi32, ADD64mi8)
ENTRY(ADD64ri32, ADD64ri8)
ENTRY(AND16mi, AND16mi8)
ENTRY(AND16ri, AND16ri8)
ENTRY(AND32mi, AND32mi8)
ENTRY(AND32ri, AND32ri8)
ENTRY(AND64mi32, AND64mi8)
ENTRY(AND64ri32, AND64ri8)
ENTRY(OR16mi, OR16mi8)
ENTRY(OR16ri, OR16ri8)
ENTRY(OR32mi, OR32mi8)
ENTRY(OR32ri, OR32ri8)
ENTRY(OR64mi32, OR64mi8)
ENTRY(OR64ri32, OR64ri8)
ENTRY(SUB16mi, SUB16mi8)
ENTRY(SUB16ri, SUB16ri8)
ENTRY(SUB32mi, SUB32mi8)
ENTRY(SUB32ri, SUB32ri8)
ENTRY(SUB64mi32, SUB64mi8)
ENTRY(SUB64ri32, SUB64ri8)
ENTRY(XOR16mi, XOR16mi8)
ENTRY(XOR16ri, XOR16ri8)
ENTRY(XOR32mi, XOR32mi8)
ENTRY(XOR32ri, XOR32ri8)
ENTRY(XOR64mi32, XOR64mi8)
ENTRY(XOR64ri32, XOR64ri8)
ENTRY(CMP16mi, CMP16mi8)
ENTRY(CMP16ri, CMP16ri8)
ENTRY(CMP32mi, CMP32mi8)
ENTRY(CMP32ri, CMP32ri8)
ENTRY(CMP64mi32, CMP64mi8)
ENTRY(CMP64ri32, CMP64ri8)
ENTRY(IMUL16rmi, IMUL16rmi8)
ENTRY(IMUL16rri, IMUL16rri8)
ENTRY(IMUL32rmi, IMUL32rmi8)
ENTRY(IMUL32rri, IMUL32rri8)
ENTRY(IMUL64rmi32, IMUL64rmi8)
ENTRY(IMUL64rri32, IMUL64rri8)
ENTRY(PUSH16i, PUSH16i8)
ENTRY(PUSH32i, PUSH32i8)
ENTRY(PUSH64i32, PUSH64i8)
#undef ENTRY