c5e6c886aa
The generic implementation is umin(TC, VF * vscale). Lowering to vsetvli for RISC-V will come in a future patch. This patch is a pre-requisite to be able to CodeGen vectorized code from D99750. Reviewed By: reames, frasercrmck Differential Revision: https://reviews.llvm.org/D149916
41 lines
1.3 KiB
LLVM
41 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+sve | FileCheck %s
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declare i32 @llvm.experimental.get.vector.length.i16(i16, i32, i1)
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declare i32 @llvm.experimental.get.vector.length.i32(i32, i32, i1)
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declare i32 @llvm.experimental.get.vector.length.i64(i64, i32, i1)
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define i32 @vector_length_i16(i16 zeroext %tc) {
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; CHECK-LABEL: vector_length_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntd x8
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; CHECK-NEXT: cmp w0, w8
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; CHECK-NEXT: csel w0, w0, w8, lo
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; CHECK-NEXT: ret
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%a = call i32 @llvm.experimental.get.vector.length.i16(i16 %tc, i32 2, i1 true)
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ret i32 %a
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}
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define i32 @vector_length_i32(i32 zeroext %tc) {
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; CHECK-LABEL: vector_length_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntd x8
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; CHECK-NEXT: cmp w0, w8
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; CHECK-NEXT: csel w0, w0, w8, lo
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; CHECK-NEXT: ret
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%a = call i32 @llvm.experimental.get.vector.length.i32(i32 %tc, i32 2, i1 true)
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ret i32 %a
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}
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define i32 @vector_length_i64(i64 %tc) {
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; CHECK-LABEL: vector_length_i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntd x8
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; CHECK-NEXT: cmp x0, x8
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; CHECK-NEXT: csel x0, x0, x8, lo
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; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0
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; CHECK-NEXT: ret
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%a = call i32 @llvm.experimental.get.vector.length.i64(i64 %tc, i32 2, i1 true)
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ret i32 %a
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}
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