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clang-p2996/llvm/test/CodeGen/AVR
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Jay Foad 7b3bbd83c0 Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)" 
This reverts commit 2501ae58e3.

Reverted due to various buildbot failures.
2023-10-09 12:31:32 +01:00
..
atomics
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
calling-conv/c
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features
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inline-asm
[AVR] Enable sub register liveness
2023-06-11 00:16:35 +08:00
integration
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intrinsics
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pseudo
[AVR] Fix incorrect expansion of pseudo instruction ROLBRd
2023-06-11 00:20:43 +08:00
add.ll
[AVR] Fix miscompilation of zext + add
2020-06-18 16:51:37 +02:00
addrspacecast.ll
[AVR] Support most address space casts
2023-01-24 18:41:14 +01:00
alloca.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
and.ll
[AVR] Optimize 16-bit ANDs with '1'
2016-12-31 01:07:14 +00:00
avr-rust-issue-123.ll
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block-address-is-in-progmem-space.ll
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branch-relaxation-long.ll
[AVR] Fix a crash in AVRInstrInfo::insertIndirectBranch (#67324)
2023-10-02 21:14:22 +08:00
branch-relaxation.ll
[AVR] Fix a crash in AVRInstrInfo::insertIndirectBranch (#67324)
2023-10-02 21:14:22 +08:00
brind.ll
Place the BlockAddress type in the address space of the containing function
2021-07-02 12:17:55 +01:00
bug-56423.ll
[AVR] Fix incorrect flags of livein registers when spilling them
2023-02-28 11:08:54 +08:00
call.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
clear-bss.ll
[AVR] correctly declare __do_copy_data and __do_clear_bss
2023-01-08 18:56:06 +01:00
cmp.ll
[AVR] Optimize 16-bit comparison with a constant
2023-02-09 15:13:01 +08:00
com.ll
[update_llc_test_checks] Support AVR
2021-01-26 17:50:56 +08:00
copy-data-to-ram.ll
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ctlz.ll
[AVR] Optimize 8-bit logic left/right shifts
2021-01-23 23:54:16 +08:00
ctors.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
ctpop.ll
[TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation
2021-10-11 15:28:31 -07:00
cttz.ll
[RA] Split a virtual register in cold blocks if it is not assigned preferred physical register
2023-09-15 19:52:50 +00:00
directmem.ll
[AVR] Select 16-bit LDS/STS for load/store on AVRTiny.
2022-12-23 11:03:45 +08:00
div.ll
[AVR] Do not use divmod calls for bigger integers
2020-04-20 13:56:38 +02:00
dynalloca.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
elpm.ll
[AVR] Fix incorrect expansion of pseudo instructions LPMWRdZ/ELPMWRdZ
2023-04-06 15:27:04 +08:00
eor.ll
[AVR] Add the pseudo instruction expansion pass
2016-11-16 21:58:04 +00:00
expand-integer-failure.ll
[AVR] Expand 'SELECT_CC' nodes whereever possible
2016-12-07 12:34:47 +00:00
frame.ll
[AVR] Add the pseudo instruction expansion pass
2016-11-16 21:58:04 +00:00
frmidx-iterator-bug.ll
[AVR] Fix bug which caused assertion errors for some FRMIDX instructions
2017-07-04 04:40:06 +00:00
global-aliases.ll
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hardware-mul.ll
Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"
2023-10-09 12:31:32 +01:00
high-pressure-on-ptrregs.ll
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icall-func-pointer-correct-addr-space.ll
Infer alignment of unmarked loads in IR/bitcode parsing.
2020-05-14 13:03:50 -07:00
impossible-reg-to-reg-copy.ll
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interrupts.ll
[AVR] Only push and clear R1 in interrupts when necessary
2022-08-15 14:29:38 +02:00
io.ll
[AVR] Add the pseudo instruction expansion pass
2016-11-16 21:58:04 +00:00
issue-58856-eicall.ll
[AVR] Emit 'eicall' for devices with large program memory
2023-01-23 09:06:10 +08:00
issue-cannot-select-bswap.ll
[AVR] Add a selection of CodeGen tests
2016-11-09 23:46:52 +00:00
issue-regalloc-stackframe-folding-earlyclobber.ll
[AVR] Remove the earlyclobber flag from LDDWRdYQ
2018-03-06 11:20:25 +00:00
jmp-long.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
large-return-size.ll
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lit.local.cfg
[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
2023-05-17 17:03:15 +02:00
llrint.ll
[SelectionDAG][AVR] Add support for lrint and lround intrinsics
2023-01-08 18:56:07 +01:00
llround-conv.ll
[SelectionDAG][AVR] Add support for lrint and lround intrinsics
2023-01-08 18:56:07 +01:00
load.ll
[AVR] Disable post increment load from program memory space
2023-04-12 11:52:55 +08:00
lower-formal-args-struct-return.ll
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lower-formal-arguments-assertion.ll
[AVR] Add a selection of CodeGen tests
2016-11-09 23:46:52 +00:00
lpmx.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
lrint.ll
[SelectionDAG][AVR] Add support for lrint and lround intrinsics
2023-01-08 18:56:07 +01:00
lround-conv.ll
[SelectionDAG][AVR] Add support for lrint and lround intrinsics
2023-01-08 18:56:07 +01:00
neg.ll
[AVR] Fix expansion of NEGW
2021-03-03 15:36:05 +01:00
no-clear-bss.ll
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no-copy-data.ll
[AVR] correctly declare __do_copy_data and __do_clear_bss
2023-01-08 18:56:06 +01:00
no-print-operand-twice.ll
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or.ll
[AVR] Add the pseudo instruction expansion pass
2016-11-16 21:58:04 +00:00
pr43443-ctor-alias.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
PR31344.ll
[AVR] Optimize 16-bit ORs with '0'
2016-12-30 00:21:56 +00:00
PR31345.ll
[AVR] Optimize 16-bit ANDs with '1'
2016-12-31 01:07:14 +00:00
PR37143.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
pre-schedule.ll
[ScheduleDAGRRList] Do not preschedule the node has ADJCALLSTACKDOWN parent
2019-01-18 08:36:06 +00:00
progmem-extended.ll
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progmem.ll
[AVR] Add the pseudo instruction expansion pass
2016-11-16 21:58:04 +00:00
rem.ll
[AVR] Add a selection of CodeGen tests
2016-11-09 23:46:52 +00:00
return.ll
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rot.ll
[AVR] Fix incorrect expansion of pseudo instruction ROLBRd
2023-06-11 00:20:43 +08:00
rotate.ll
[AVR] Optimize 8-bit rotation when rotation bits == 3
2023-06-11 08:41:47 +08:00
runtime-trig.ll
[AVR] Add a selection of CodeGen tests
2016-11-09 23:46:52 +00:00
rust-avr-bug-37.ll
Infer alignment of unmarked loads in IR/bitcode parsing.
2020-05-14 13:03:50 -07:00
rust-avr-bug-95.ll
Infer alignment of unmarked loads in IR/bitcode parsing.
2020-05-14 13:03:50 -07:00
rust-avr-bug-99.ll
[AVR] Set trackLivenessAfterRegAlloc
2018-06-11 14:46:48 +00:00
rust-avr-bug-112.ll
[AVR] Fix a backend bug that left extraneous operands after expansion
2018-11-05 05:49:04 +00:00
rust-bug-98167.ll
[AVR] Fix expanding MOVW for overlapping registers
2022-06-26 17:20:07 +08:00
rust-trait-object.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
sections.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
select-must-add-unconditional-jump.ll
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sext.ll
[AVR] Add the pseudo instruction expansion pass
2016-11-16 21:58:04 +00:00
shift32.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
shift-expand.ll
[AVR] Expand shifts of all types except int8 and int16
2023-07-19 11:57:00 +08:00
shift.ll
[AVR] Expand shifts of all types except int8 and int16
2023-07-19 11:57:00 +08:00
sign-extension.ll
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smul-with-overflow.ll
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software-mul.ll
[AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL
2019-01-18 06:10:41 +00:00
std-ldd-immediate-overflow.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
stdwstk.ll
[CodeGen] Add machine verification to some tests
2023-07-24 11:04:10 +01:00
store-undef.ll
[AVR] Make use of the constant value 0 in R1
2022-01-23 17:08:01 +01:00
store.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
struct.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
sub.ll
[AVR] Add the pseudo instruction expansion pass
2016-11-16 21:58:04 +00:00
trunc.ll
[AVR] Add a selection of CodeGen tests
2016-11-09 23:46:52 +00:00
umul-with-overflow.ll
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umul.with.overflow.i16-bug.ll
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unaligned-atomic-ops.ll
[AVR] Support unaligned store
2022-08-15 14:29:37 +02:00
varargs.ll
[AVR] Fix an issue of writing 16-bit ports
2023-04-17 15:35:33 +08:00
xor.ll
[AVR] Add the pseudo instruction expansion pass
2016-11-16 21:58:04 +00:00
zeroreg.ll
[AVR] Only push and clear R1 in interrupts when necessary
2022-08-15 14:29:38 +02:00
zext.ll
[AVR] Fix the test suite after r326500.
2018-03-05 20:56:25 +00:00