d391e4fe84
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302
71 lines
3.1 KiB
YAML
71 lines
3.1 KiB
YAML
# REQUIRES: x86-registered-target
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# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=mir-debugify,dead-mi-elimination,mir-check-debugify -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=mir-debugify,mir-check-debugify -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK-PASS
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--- |
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; ModuleID = 'check-line-and-variables.mir'
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source_filename = "check-line-and-variables.ll"
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@ga = dso_local global i32 2, align 4
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; Function Attrs: noinline nounwind optnone uwtable
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define dso_local i32 @foo(i32 %a, i32 %b) {
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entry:
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%a.addr = alloca i32, align 4
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%b.addr = alloca i32, align 4
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%c = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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store i32 %b, i32* %b.addr, align 4
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%0 = load i32, i32* %a.addr, align 4
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%1 = load i32, i32* %b.addr, align 4
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%add = add nsw i32 %0, %1
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store i32 %add, i32* %c, align 4
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%2 = load i32, i32* %c, align 4
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%mul = mul nsw i32 %2, 2
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store i32 %mul, i32* @ga, align 4
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%3 = load i32, i32* %c, align 4
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; dead-mi-elimination will remove %4 = ...
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%4 = load i32, i32* %a.addr, align 4
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ret i32 %3
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}
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...
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---
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name: foo
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alignment: 16
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stack:
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- { id: 0, name: a.addr, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, name: b.addr, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 2, name: c, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.0.entry:
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liveins: $edi, $esi
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%2:gr32 = COPY $esi
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%0:gr32 = COPY $edi
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%1:gr32 = COPY killed %0
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%3:gr32 = COPY killed %2
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MOV32mr %stack.0.a.addr, 1, $noreg, 0, $noreg, %1 :: (store (s32) into %ir.a.addr)
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MOV32mr %stack.1.b.addr, 1, $noreg, 0, $noreg, %3 :: (store (s32) into %ir.b.addr)
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%14:gr32 = MOV32rm %stack.0.a.addr, 1, $noreg, 0, $noreg :: (load (s32) from %ir.a.addr)
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%13:gr32 = ADD32rm killed %14, %stack.1.b.addr, 1, $noreg, 0, $noreg, implicit-def $eflags :: (load (s32) from %ir.b.addr)
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; dead-mi-elimination will remove %15:gr32 = ...
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%15:gr32 = MOV32rm %stack.0.a.addr, 1, $noreg, 0, $noreg :: (load (s32) from %ir.a.addr)
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MOV32mr %stack.2.c, 1, $noreg, 0, $noreg, killed %13 :: (store (s32) into %ir.c)
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%9:gr32 = MOV32rm %stack.2.c, 1, $noreg, 0, $noreg :: (load (s32) from %ir.c)
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%8:gr32 = SHL32ri killed %9, 1, implicit-def $eflags
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MOV32mr $noreg, 1, $noreg, @ga, $noreg, killed %8 :: (store (s32) into @ga)
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%5:gr32 = MOV32rm %stack.2.c, 1, $noreg, 0, $noreg :: (load (s32) from %ir.c)
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$eax = COPY %5
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RET64 implicit $eax
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;CHECK: WARNING: Missing line 9
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;CHECK-NEXT: Machine IR debug info check: FAIL
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;CHECK-PASS: Machine IR debug info check: PASS
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...
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