47601815ec
Some CPUs do not allow memory accesses to be unaligned, e.g. 2k1000la who uses the la264 core on which misaligned access will trigger an exception. In this patch, a backend feature called `ual` is defined to decribe whether the CPU supports unaligned memroy accesses. And this feature can be toggled by clang options `-m[no-]unaligned-access` or the aliases `-m[no-]strict-align`. When this feature is on, `allowsMisalignedMemoryAccesses` sets the speed number to 1 and returns true that allows the codegen to generate unaligned memory access insns. Clang options `-m[no-]unaligned-access` are moved from `m_arm_Features_Group` to `m_Group` because now more than one targets use them. And a test is added to show that they remain unused on a target that does not support them. In addition, to keep compatible with gcc, a new alias `-mno-strict-align` is added which is equal to `-munaligned-access`. The feature name `ual` is consistent with linux kernel [1] and the output of `lscpu` or `/proc/cpuinfo` [2]. There is an `LLT` variant of `allowsMisalignedMemoryAccesses`, but seems that curently it is only used in GlobalISel which LoongArch doesn't support yet. So this variant is not implemented in this patch. [1]: https://github.com/torvalds/linux/blob/master/arch/loongarch/include/asm/cpu.h#L77 [2]: https://github.com/torvalds/linux/blob/master/arch/loongarch/kernel/proc.c#L75 Reviewed By: xen0n Differential Revision: https://reviews.llvm.org/D149946
73 lines
2.4 KiB
LLVM
73 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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;; Test the ual feature which is similar to AArch64/arm64-strict-align.ll.
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; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32-ALIGNED
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; RUN: llc --mtriple=loongarch32 --mattr=+ual < %s | FileCheck %s --check-prefix=LA32-UNALIGNED
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; RUN: llc --mtriple=loongarch32 --mattr=-ual < %s | FileCheck %s --check-prefix=LA32-ALIGNED
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; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64-UNALIGNED
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; RUN: llc --mtriple=loongarch64 --mattr=+ual < %s | FileCheck %s --check-prefix=LA64-UNALIGNED
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; RUN: llc --mtriple=loongarch64 --mattr=-ual < %s | FileCheck %s --check-prefix=LA64-ALIGNED
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define i32 @f0(ptr %p) nounwind {
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; LA32-ALIGNED-LABEL: f0:
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; LA32-ALIGNED: # %bb.0:
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; LA32-ALIGNED-NEXT: ld.hu $a1, $a0, 0
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; LA32-ALIGNED-NEXT: ld.hu $a0, $a0, 2
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; LA32-ALIGNED-NEXT: slli.w $a0, $a0, 16
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; LA32-ALIGNED-NEXT: or $a0, $a0, $a1
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; LA32-ALIGNED-NEXT: ret
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;
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; LA32-UNALIGNED-LABEL: f0:
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; LA32-UNALIGNED: # %bb.0:
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; LA32-UNALIGNED-NEXT: ld.w $a0, $a0, 0
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; LA32-UNALIGNED-NEXT: ret
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;
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; LA64-UNALIGNED-LABEL: f0:
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; LA64-UNALIGNED: # %bb.0:
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; LA64-UNALIGNED-NEXT: ld.w $a0, $a0, 0
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; LA64-UNALIGNED-NEXT: ret
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;
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; LA64-ALIGNED-LABEL: f0:
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; LA64-ALIGNED: # %bb.0:
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; LA64-ALIGNED-NEXT: ld.hu $a1, $a0, 0
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; LA64-ALIGNED-NEXT: ld.h $a0, $a0, 2
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; LA64-ALIGNED-NEXT: slli.d $a0, $a0, 16
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; LA64-ALIGNED-NEXT: or $a0, $a0, $a1
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; LA64-ALIGNED-NEXT: ret
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%tmp = load i32, ptr %p, align 2
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ret i32 %tmp
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}
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define i64 @f1(ptr %p) nounwind {
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; LA32-ALIGNED-LABEL: f1:
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; LA32-ALIGNED: # %bb.0:
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; LA32-ALIGNED-NEXT: ld.w $a2, $a0, 0
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; LA32-ALIGNED-NEXT: ld.w $a1, $a0, 4
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; LA32-ALIGNED-NEXT: move $a0, $a2
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; LA32-ALIGNED-NEXT: ret
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;
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; LA32-UNALIGNED-LABEL: f1:
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; LA32-UNALIGNED: # %bb.0:
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; LA32-UNALIGNED-NEXT: ld.w $a2, $a0, 0
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; LA32-UNALIGNED-NEXT: ld.w $a1, $a0, 4
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; LA32-UNALIGNED-NEXT: move $a0, $a2
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; LA32-UNALIGNED-NEXT: ret
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;
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; LA64-UNALIGNED-LABEL: f1:
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; LA64-UNALIGNED: # %bb.0:
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; LA64-UNALIGNED-NEXT: ld.d $a0, $a0, 0
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; LA64-UNALIGNED-NEXT: ret
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;
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; LA64-ALIGNED-LABEL: f1:
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; LA64-ALIGNED: # %bb.0:
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; LA64-ALIGNED-NEXT: ld.wu $a1, $a0, 0
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; LA64-ALIGNED-NEXT: ld.wu $a0, $a0, 4
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; LA64-ALIGNED-NEXT: slli.d $a0, $a0, 32
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; LA64-ALIGNED-NEXT: or $a0, $a0, $a1
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; LA64-ALIGNED-NEXT: ret
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%tmp = load i64, ptr %p, align 4
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ret i64 %tmp
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}
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