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1daf2994de49d1ecba4bee4e6842aa8a564cbc96
clang-p2996/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect
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Michael Maitland a6f7278595 [RISCV][GISEL] legalize, regbankselect, and instruction-select G_PTRMASK (#73062) 
This is done in instruction-select instead of in legalization for the
sake of alias analysis.
2023-11-30 11:54:01 -05:00
..
alu-rv32.mir
[RISCV][GISel] Support G_PTRTOINT and G_INTTOPTR (#69542)
2023-10-20 12:03:09 -07:00
alu-rv64.mir
[RISCV][GISel] Support G_PTRTOINT and G_INTTOPTR (#69542)
2023-10-20 12:03:09 -07:00
copy-rv32.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
copy-rv64.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
ext-trunc-rv64.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
fcmp-rv32.mir
[RISCV][GISel] Add support for G_FCMP with F and D extensions. (#70624)
2023-11-09 20:45:35 -08:00
fcmp-rv64.mir
[RISCV][GISel] Add support for G_FCMP with F and D extensions. (#70624)
2023-11-09 20:45:35 -08:00
fp-arith.mir
[RISCV][GISel] Support G_FCOPYSIGN with F and D extension.
2023-11-28 21:50:04 -08:00
fp-ext-trunc.mir
[RISCV][GISel] Support G_FPEXT/G_FPTRUNC for F and D extension.
2023-10-28 16:22:17 -07:00
fp-load-store.mir
[RISC][GISel] Consider ABI copies when picking register bank for G_LOAD/STORE.
2023-11-14 18:57:08 -08:00
fp-select-rv32.mir
[RISCV][GISel] Support s64 G_SELECT on RV32 with D extension.
2023-11-28 23:36:51 -08:00
fp-select-rv64.mir
[RISCV] Add register bank and instruction selection support for FP G_SELECT. (#72726)
2023-11-27 10:38:25 -08:00
fptoi-rv32.mir
[RISCV][GISel] Add support for G_FPTOSI/G_FPTOUI with F and D extensions.
2023-11-07 10:14:37 -08:00
fptoi-rv64.mir
[RISCV][GISel] Add support for G_FPTOSI/G_FPTOUI with F and D extensions.
2023-11-07 10:14:37 -08:00
frame-index.mir
[RISCV][GlobalISel] Select G_FRAME_INDEX (#68254)
2023-10-17 17:56:42 -07:00
global-rv32.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
global-rv64.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
implicit-def-rv32.mir
[RISCV][GISEL] regbankselect and instruction-select for G_IMPLICIT_DEF (#73060)
2023-11-30 11:38:02 -05:00
implicit-def-rv64.mir
[RISCV][GISEL] regbankselect and instruction-select for G_IMPLICIT_DEF (#73060)
2023-11-30 11:38:02 -05:00
is-fpclass-rv32.mir
[RISCV][GISel] Add support for G_IS_FPCLASS in F and D extensions (#72000)
2023-11-22 16:43:20 -08:00
is-fpclass-rv64.mir
[RISCV][GISel] Add support for G_IS_FPCLASS in F and D extensions (#72000)
2023-11-22 16:43:20 -08:00
itofp-rv32.mir
[RISCV][GISel] Add support for G_SITOFP/G_UITOFP with F and D extensions.
2023-11-07 16:40:58 -08:00
itofp-rv64.mir
[RISCV][GISel] Add support for G_SITOFP/G_UITOFP with F and D extensions.
2023-11-07 16:40:58 -08:00
jump-table-brjt-rv32.mir
[RISCV][GISel] Legalizer and register bank selection for G_JUMP_TABLE and G_BRJT (#71970)
2023-11-10 13:09:24 -08:00
jump-table-brjt-rv64.mir
[RISCV][GISel] Legalizer and register bank selection for G_JUMP_TABLE and G_BRJT (#71970)
2023-11-10 13:09:24 -08:00
load-rv32.mir
[RISCV][GISel] Add G_SEXTLOAD to legalizer and regbank select. Add instruction selection tests.
2023-10-25 00:13:21 -07:00
load-rv64.mir
[RISCV][GISel] Add G_SEXTLOAD to legalizer and regbank select. Add instruction selection tests.
2023-10-25 00:13:21 -07:00
merge-unmerge-rv32.mir
[RISCV][GISEL] legalize, regbankselect, and instruction-select for G_… (#73061)
2023-11-30 11:53:25 -05:00
minmax-rv32.mir
[RISCV][GISel] Support G_UMIN/UMAX/SMIN/SMAX legal with Zbb. (#72182)
2023-11-13 20:57:38 -08:00
minmax-rv64.mir
[RISCV][GISel] Support G_UMIN/UMAX/SMIN/SMAX legal with Zbb. (#72182)
2023-11-13 20:57:38 -08:00
phi-rv32.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
phi-rv64.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
ptrmask-rv32.mir
[RISCV][GISEL] legalize, regbankselect, and instruction-select G_PTRMASK (#73062)
2023-11-30 11:54:01 -05:00
ptrmask-rv64.mir
[RISCV][GISEL] legalize, regbankselect, and instruction-select G_PTRMASK (#73062)
2023-11-30 11:54:01 -05:00
select-rv32.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
select-rv64.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
store-rv32.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
store-rv64.mir
[test] -march -> -mtriple (#67741)
2023-09-29 10:43:23 -07:00
vec-args-ret.mir
[RISCV][GISEL] Add vector RegisterBanks and vector support in getRegBankFromRegClass
2023-11-15 15:08:29 -08:00