c65b4d64d4
Alignment of an alloca in IR can be lower than the preferred alignment on purpose, but this override essentially treats the preferred alignment as the minimum alignment. The patch changes this behavior to always use the specified alignment. If alignment is not set explicitly in LLVM IR, it is set to DL.getPrefTypeAlign(Ty) in computeAllocaDefaultAlign. Tests are changed as well: explicit alignment is increased to match the preferred alignment if it changes output, or omitted when it is hard to determine the right value (e.g. for pointers, some structs, or weird types). Differential Revision: https://reviews.llvm.org/D135462
54 lines
2.0 KiB
LLVM
54 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I-FPELIM %s
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; RUN: llc -mtriple=riscv32 -frame-pointer=all -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I-WITHFP %s
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%struct.key_t = type { i32, [16 x i8] }
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define i32 @test() nounwind {
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; RV32I-FPELIM-LABEL: test:
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; RV32I-FPELIM: # %bb.0:
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; RV32I-FPELIM-NEXT: addi sp, sp, -32
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; RV32I-FPELIM-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
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; RV32I-FPELIM-NEXT: sw zero, 24(sp)
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; RV32I-FPELIM-NEXT: sw zero, 20(sp)
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; RV32I-FPELIM-NEXT: sw zero, 16(sp)
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; RV32I-FPELIM-NEXT: sw zero, 12(sp)
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; RV32I-FPELIM-NEXT: sw zero, 8(sp)
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; RV32I-FPELIM-NEXT: addi a0, sp, 12
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; RV32I-FPELIM-NEXT: call test1@plt
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; RV32I-FPELIM-NEXT: li a0, 0
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; RV32I-FPELIM-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
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; RV32I-FPELIM-NEXT: addi sp, sp, 32
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; RV32I-FPELIM-NEXT: ret
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;
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; RV32I-WITHFP-LABEL: test:
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; RV32I-WITHFP: # %bb.0:
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; RV32I-WITHFP-NEXT: addi sp, sp, -32
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; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
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; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32I-WITHFP-NEXT: addi s0, sp, 32
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; RV32I-WITHFP-NEXT: sw zero, -16(s0)
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; RV32I-WITHFP-NEXT: sw zero, -20(s0)
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; RV32I-WITHFP-NEXT: sw zero, -24(s0)
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; RV32I-WITHFP-NEXT: sw zero, -28(s0)
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; RV32I-WITHFP-NEXT: sw zero, -32(s0)
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; RV32I-WITHFP-NEXT: addi a0, s0, -28
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; RV32I-WITHFP-NEXT: call test1@plt
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; RV32I-WITHFP-NEXT: li a0, 0
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; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
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; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
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; RV32I-WITHFP-NEXT: addi sp, sp, 32
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; RV32I-WITHFP-NEXT: ret
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%key = alloca %struct.key_t, align 8
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call void @llvm.memset.p0.i64(ptr align 4 %key, i8 0, i64 20, i1 false)
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%1 = getelementptr inbounds %struct.key_t, ptr %key, i64 0, i32 1, i64 0
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call void @test1(ptr %1)
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ret i32 0
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}
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declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1)
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declare void @test1(ptr)
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