fb3e3ef62e
ValueTracking attempts to match compare+select patterns to FP min/max operations, but it was created before the newer IEEE-754-2019 minimum/maximum ops were defined. Ie, matchSelectPattern() does not account for the -0.0/+0.0 behavior that is specified in the newer standard. FMINIMUM/FMAXIMUM nodes were created to map to the newer standard: /// FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 /// as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008 /// semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics. We could adjust ValueTracking to deal with signed zero, but it seems like a moot point given the divergent NaN behavior discussed in D143056, so just delete this possibility to avoid bugs when converting IR to SDAG. Differential Revision: https://reviews.llvm.org/D143106
88 lines
2.6 KiB
LLVM
88 lines
2.6 KiB
LLVM
; Test vector maximum/minimum with a zero splat on z14.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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define <2 x double> @f1(<2 x double> %val) {
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; CHECK-LABEL: f1:
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; CHECK: vgbm %v0, 0
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; CHECK-NEXT: vfmaxdb %v24, %v24, %v0, 4
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; CHECK-NEXT: br %r14
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%cmp = fcmp ogt <2 x double> %val, zeroinitializer
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%ret = select <2 x i1> %cmp, <2 x double> %val, <2 x double> zeroinitializer
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ret <2 x double> %ret
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}
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define <2 x double> @f2(<2 x double> %val) {
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; CHECK-LABEL: f2:
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; CHECK: vgbm %v0, 0
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; CHECK-NEXT: vfmindb %v24, %v24, %v0, 4
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; CHECK-NEXT: br %r14
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%cmp = fcmp olt <2 x double> %val, zeroinitializer
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%ret = select <2 x i1> %cmp, <2 x double> %val, <2 x double> zeroinitializer
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ret <2 x double> %ret
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}
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define <4 x float> @f3(<4 x float> %val) {
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; CHECK-LABEL: f3:
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; CHECK: vgbm %v0, 0
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; CHECK-NEXT: vfmaxsb %v24, %v24, %v0, 4
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; CHECK-NEXT: br %r14
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%cmp = fcmp ogt <4 x float> %val, zeroinitializer
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%ret = select <4 x i1> %cmp, <4 x float> %val, <4 x float> zeroinitializer
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ret <4 x float> %ret
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}
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define <4 x float> @f4(<4 x float> %val) {
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; CHECK-LABEL: f4:
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; CHECK: vgbm %v0, 0
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; CHECK-NEXT: vfminsb %v24, %v24, %v0, 4
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; CHECK-NEXT: br %r14
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%cmp = fcmp olt <4 x float> %val, zeroinitializer
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%ret = select <4 x i1> %cmp, <4 x float> %val, <4 x float> zeroinitializer
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ret <4 x float> %ret
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}
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define <2 x double> @f5(<2 x double> %val) {
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; CHECK-LABEL: f5:
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; CHECK: vgbm %v0, 0
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; CHECK-NEXT: vfchedb %v1, %v0, %v24
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; CHECK-NEXT: vsel %v24, %v0, %v24, %v1
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; CHECK-NEXT: br %r14
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%cmp = fcmp ugt <2 x double> %val, zeroinitializer
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%ret = select <2 x i1> %cmp, <2 x double> %val, <2 x double> zeroinitializer
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ret <2 x double> %ret
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}
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define <2 x double> @f6(<2 x double> %val) {
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; CHECK-LABEL: f6:
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; CHECK: vgbm %v0, 0
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; CHECK-NEXT: vfchedb %v1, %v24, %v0
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; CHECK-NEXT: vsel %v24, %v0, %v24, %v1
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; CHECK-NEXT: br %r14
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%cmp = fcmp ult <2 x double> %val, zeroinitializer
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%ret = select <2 x i1> %cmp, <2 x double> %val, <2 x double> zeroinitializer
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ret <2 x double> %ret
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}
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define <4 x float> @f7(<4 x float> %val) {
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; CHECK-LABEL: f7:
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; CHECK: vgbm %v0, 0
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; CHECK-NEXT: vfchesb %v1, %v0, %v24
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; CHECK-NEXT: vsel %v24, %v0, %v24, %v1
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; CHECK-NEXT: br %r14
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%cmp = fcmp ugt <4 x float> %val, zeroinitializer
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%ret = select <4 x i1> %cmp, <4 x float> %val, <4 x float> zeroinitializer
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ret <4 x float> %ret
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}
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define <4 x float> @f8(<4 x float> %val) {
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; CHECK-LABEL: f8:
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; CHECK: vgbm %v0, 0
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; CHECK-NEXT: vfchesb %v1, %v24, %v0
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; CHECK-NEXT: vsel %v24, %v0, %v24, %v1
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; CHECK-NEXT: br %r14
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%cmp = fcmp ult <4 x float> %val, zeroinitializer
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%ret = select <4 x i1> %cmp, <4 x float> %val, <4 x float> zeroinitializer
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ret <4 x float> %ret
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}
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