Chen Zheng 454758ab69 [PowerPC] add a new subtarget feature fastMFLR ...

Some PowerPC CPU may have slow MFLR instruction, so we need to
schedule the MFLR and its store in function prologue away to
hidden the long latency for slow MFLR instruction.

This patch adds a new feature fastMFLR and the new feature will
be used in https://reviews.llvm.org/D137423.

Reviewed By: RolandF

Differential Revision: https://reviews.llvm.org/D137612

2022-11-10 00:07:47 -05:00

8.6 KiB

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