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clang-p2996/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Craig Topper 258bb453fb [RISCV] Without Zfh, promote f16 inputs before creating RISCVISD::FCVT_W(U)_RV64 nodes. 
This allows us to remove a couple more Zfhmin isel patterns.
2022-12-07 12:25:30 -08:00

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