99c9b37d11
This is the first patch in a series intended for removing flag -enable-new-pm=0 from lit tests. This is part of a bigger effort of completely removing legacy code related to legacy pass manager in favor of currently default new pass manager. In this patch flag has been removed only from tests where no significant change has been required because checks has been duplicated for both PMs. Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D134150
89 lines
3.4 KiB
LLVM
89 lines
3.4 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt < %s -passes='function(loop-vectorize,instcombine)' -force-vector-width=2 -force-vector-interleave=1 -debug-only=loop-vectorize -disable-output -print-after=instcombine 2>&1 | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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; CHECK-LABEL: phi_two_incoming_values
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; CHECK: LV: Found an estimated cost of 1 for VF 2 For instruction: %i = phi i64 [ %i.next, %if.end ], [ 0, %entry ]
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; CHECK: LV: Found an estimated cost of 1 for VF 2 For instruction: %tmp5 = phi i32 [ %tmp1, %for.body ], [ %tmp4, %if.then ]
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; CHECK: define void @phi_two_incoming_values(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; CHECK: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* {{.*}}
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; CHECK: [[TMP5:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], zeroinitializer
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; CHECK-NEXT: [[TMP6:%.*]] = zext <2 x i1> [[TMP5]] to <2 x i32>
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; CHECK-NEXT: [[PREDPHI:%.*]] = add <2 x i32> [[WIDE_LOAD]], [[TMP6]]
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; CHECK: store <2 x i32> [[PREDPHI]], <2 x i32>* {{.*}}
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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;
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define void @phi_two_incoming_values(i32* %a, i32* %b, i64 %n) {
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entry:
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br label %for.body
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for.body:
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%i = phi i64 [ %i.next, %if.end ], [ 0, %entry ]
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%tmp0 = getelementptr inbounds i32, i32* %a, i64 %i
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%tmp1 = load i32, i32* %tmp0, align 4
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%tmp2 = getelementptr inbounds i32, i32* %b, i64 %i
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%tmp3 = icmp sgt i32 %tmp1, 0
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br i1 %tmp3, label %if.then, label %if.end
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if.then:
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%tmp4 = add i32 %tmp1, 1
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br label %if.end
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if.end:
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%tmp5 = phi i32 [ %tmp1, %for.body ], [ %tmp4, %if.then ]
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store i32 %tmp5, i32* %tmp2, align 4
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%i.next = add i64 %i, 1
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%cond = icmp eq i64 %i, %n
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br i1 %cond, label %for.end, label %for.body
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for.end:
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ret void
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}
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; CHECK-LABEL: phi_three_incoming_values
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; CHECK: LV: Found an estimated cost of 1 for VF 2 For instruction: %i = phi i64 [ %i.next, %if.end ], [ 0, %entry ]
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; CHECK: LV: Found an estimated cost of 2 for VF 2 For instruction: %tmp8 = phi i32 [ 9, %for.body ], [ 3, %if.then ], [ %tmp7, %if.else ]
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; CHECK: define void @phi_three_incoming_values(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; CHECK: [[PREDPHI:%.*]] = select <2 x i1> {{.*}}, <2 x i32> <i32 3, i32 3>, <2 x i32> <i32 9, i32 9>
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; CHECK: [[PREDPHI7:%.*]] = select <2 x i1> {{.*}}, <2 x i32> {{.*}}, <2 x i32> [[PREDPHI]]
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; CHECK: store <2 x i32> [[PREDPHI7]], <2 x i32>* {{.*}}
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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;
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define void @phi_three_incoming_values(i32* %a, i32* %b, i64 %n) {
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entry:
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br label %for.body
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for.body:
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%i = phi i64 [ %i.next, %if.end ], [ 0, %entry ]
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%tmp0 = getelementptr inbounds i32, i32* %a, i64 %i
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%tmp1 = load i32, i32* %tmp0, align 4
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%tmp2 = getelementptr inbounds i32, i32* %b, i64 %i
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%tmp3 = load i32, i32* %tmp2, align 4
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%tmp4 = icmp sgt i32 %tmp1, %tmp3
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br i1 %tmp4, label %if.then, label %if.end
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if.then:
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%tmp5 = icmp sgt i32 %tmp1, 19
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br i1 %tmp5, label %if.end, label %if.else
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if.else:
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%tmp6 = icmp slt i32 %tmp3, 4
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%tmp7 = select i1 %tmp6, i32 4, i32 5
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br label %if.end
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if.end:
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%tmp8 = phi i32 [ 9, %for.body ], [ 3, %if.then ], [ %tmp7, %if.else ]
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store i32 %tmp8, i32* %tmp0, align 4
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%i.next = add i64 %i, 1
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%cond = icmp eq i64 %i, %n
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br i1 %cond, label %for.end, label %for.body
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for.end:
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ret void
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}
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