67d0d7ac0a
The patch introduces the required changes to update the pass declarations and definitions to use the new autogenerated files and allow dropping the old infrastructure. Reviewed By: mehdi_amini, rriddle Differential Review: https://reviews.llvm.org/D132838
402 lines
15 KiB
C++
402 lines
15 KiB
C++
//===- ArithmeticToLLVM.cpp - Arithmetic to LLVM dialect conversion -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/ArithmeticToLLVM/ArithmeticToLLVM.h"
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#include "mlir/Conversion/LLVMCommon/ConversionTarget.h"
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#include "mlir/Conversion/LLVMCommon/VectorPattern.h"
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#include "mlir/Dialect/Arithmetic/IR/Arithmetic.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/IR/TypeUtilities.h"
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#include "mlir/Pass/Pass.h"
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namespace mlir {
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#define GEN_PASS_DEF_CONVERTARITHMETICTOLLVM
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#include "mlir/Conversion/Passes.h.inc"
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} // namespace mlir
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using namespace mlir;
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namespace {
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//===----------------------------------------------------------------------===//
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// Straightforward Op Lowerings
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//===----------------------------------------------------------------------===//
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using AddFOpLowering = VectorConvertToLLVMPattern<arith::AddFOp, LLVM::FAddOp>;
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using AddIOpLowering = VectorConvertToLLVMPattern<arith::AddIOp, LLVM::AddOp>;
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using AndIOpLowering = VectorConvertToLLVMPattern<arith::AndIOp, LLVM::AndOp>;
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using BitcastOpLowering =
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VectorConvertToLLVMPattern<arith::BitcastOp, LLVM::BitcastOp>;
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using DivFOpLowering = VectorConvertToLLVMPattern<arith::DivFOp, LLVM::FDivOp>;
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using DivSIOpLowering =
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VectorConvertToLLVMPattern<arith::DivSIOp, LLVM::SDivOp>;
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using DivUIOpLowering =
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VectorConvertToLLVMPattern<arith::DivUIOp, LLVM::UDivOp>;
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using ExtFOpLowering = VectorConvertToLLVMPattern<arith::ExtFOp, LLVM::FPExtOp>;
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using ExtSIOpLowering =
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VectorConvertToLLVMPattern<arith::ExtSIOp, LLVM::SExtOp>;
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using ExtUIOpLowering =
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VectorConvertToLLVMPattern<arith::ExtUIOp, LLVM::ZExtOp>;
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using FPToSIOpLowering =
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VectorConvertToLLVMPattern<arith::FPToSIOp, LLVM::FPToSIOp>;
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using FPToUIOpLowering =
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VectorConvertToLLVMPattern<arith::FPToUIOp, LLVM::FPToUIOp>;
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using MaxFOpLowering =
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VectorConvertToLLVMPattern<arith::MaxFOp, LLVM::MaxNumOp>;
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using MaxSIOpLowering =
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VectorConvertToLLVMPattern<arith::MaxSIOp, LLVM::SMaxOp>;
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using MaxUIOpLowering =
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VectorConvertToLLVMPattern<arith::MaxUIOp, LLVM::UMaxOp>;
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using MinFOpLowering =
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VectorConvertToLLVMPattern<arith::MinFOp, LLVM::MinNumOp>;
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using MinSIOpLowering =
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VectorConvertToLLVMPattern<arith::MinSIOp, LLVM::SMinOp>;
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using MinUIOpLowering =
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VectorConvertToLLVMPattern<arith::MinUIOp, LLVM::UMinOp>;
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using MulFOpLowering = VectorConvertToLLVMPattern<arith::MulFOp, LLVM::FMulOp>;
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using MulIOpLowering = VectorConvertToLLVMPattern<arith::MulIOp, LLVM::MulOp>;
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using NegFOpLowering = VectorConvertToLLVMPattern<arith::NegFOp, LLVM::FNegOp>;
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using OrIOpLowering = VectorConvertToLLVMPattern<arith::OrIOp, LLVM::OrOp>;
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using RemFOpLowering = VectorConvertToLLVMPattern<arith::RemFOp, LLVM::FRemOp>;
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using RemSIOpLowering =
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VectorConvertToLLVMPattern<arith::RemSIOp, LLVM::SRemOp>;
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using RemUIOpLowering =
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VectorConvertToLLVMPattern<arith::RemUIOp, LLVM::URemOp>;
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using SelectOpLowering =
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VectorConvertToLLVMPattern<arith::SelectOp, LLVM::SelectOp>;
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using ShLIOpLowering = VectorConvertToLLVMPattern<arith::ShLIOp, LLVM::ShlOp>;
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using ShRSIOpLowering =
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VectorConvertToLLVMPattern<arith::ShRSIOp, LLVM::AShrOp>;
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using ShRUIOpLowering =
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VectorConvertToLLVMPattern<arith::ShRUIOp, LLVM::LShrOp>;
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using SIToFPOpLowering =
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VectorConvertToLLVMPattern<arith::SIToFPOp, LLVM::SIToFPOp>;
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using SubFOpLowering = VectorConvertToLLVMPattern<arith::SubFOp, LLVM::FSubOp>;
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using SubIOpLowering = VectorConvertToLLVMPattern<arith::SubIOp, LLVM::SubOp>;
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using TruncFOpLowering =
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VectorConvertToLLVMPattern<arith::TruncFOp, LLVM::FPTruncOp>;
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using TruncIOpLowering =
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VectorConvertToLLVMPattern<arith::TruncIOp, LLVM::TruncOp>;
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using UIToFPOpLowering =
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VectorConvertToLLVMPattern<arith::UIToFPOp, LLVM::UIToFPOp>;
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using XOrIOpLowering = VectorConvertToLLVMPattern<arith::XOrIOp, LLVM::XOrOp>;
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//===----------------------------------------------------------------------===//
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// Op Lowering Patterns
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//===----------------------------------------------------------------------===//
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/// Directly lower to LLVM op.
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struct ConstantOpLowering : public ConvertOpToLLVMPattern<arith::ConstantOp> {
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using ConvertOpToLLVMPattern::ConvertOpToLLVMPattern;
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LogicalResult
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matchAndRewrite(arith::ConstantOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override;
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};
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/// The lowering of index_cast becomes an integer conversion since index
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/// becomes an integer. If the bit width of the source and target integer
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/// types is the same, just erase the cast. If the target type is wider,
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/// sign-extend the value, otherwise truncate it.
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struct IndexCastOpLowering : public ConvertOpToLLVMPattern<arith::IndexCastOp> {
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using ConvertOpToLLVMPattern::ConvertOpToLLVMPattern;
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LogicalResult
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matchAndRewrite(arith::IndexCastOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override;
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};
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struct AddUICarryOpLowering
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: public ConvertOpToLLVMPattern<arith::AddUICarryOp> {
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using ConvertOpToLLVMPattern::ConvertOpToLLVMPattern;
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LogicalResult
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matchAndRewrite(arith::AddUICarryOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override;
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};
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struct CmpIOpLowering : public ConvertOpToLLVMPattern<arith::CmpIOp> {
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using ConvertOpToLLVMPattern::ConvertOpToLLVMPattern;
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LogicalResult
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matchAndRewrite(arith::CmpIOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override;
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};
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struct CmpFOpLowering : public ConvertOpToLLVMPattern<arith::CmpFOp> {
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using ConvertOpToLLVMPattern::ConvertOpToLLVMPattern;
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LogicalResult
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matchAndRewrite(arith::CmpFOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override;
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};
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} // namespace
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//===----------------------------------------------------------------------===//
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// ConstantOpLowering
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//===----------------------------------------------------------------------===//
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LogicalResult
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ConstantOpLowering::matchAndRewrite(arith::ConstantOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const {
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return LLVM::detail::oneToOneRewrite(op, LLVM::ConstantOp::getOperationName(),
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adaptor.getOperands(),
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*getTypeConverter(), rewriter);
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}
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//===----------------------------------------------------------------------===//
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// IndexCastOpLowering
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//===----------------------------------------------------------------------===//
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LogicalResult IndexCastOpLowering::matchAndRewrite(
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arith::IndexCastOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const {
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Type resultType = op.getResult().getType();
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Type targetElementType =
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typeConverter->convertType(getElementTypeOrSelf(resultType));
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Type sourceElementType =
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typeConverter->convertType(getElementTypeOrSelf(op.getIn()));
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unsigned targetBits = targetElementType.getIntOrFloatBitWidth();
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unsigned sourceBits = sourceElementType.getIntOrFloatBitWidth();
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if (targetBits == sourceBits) {
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rewriter.replaceOp(op, adaptor.getIn());
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return success();
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}
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// Handle the scalar and 1D vector cases.
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Type operandType = adaptor.getIn().getType();
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if (!operandType.isa<LLVM::LLVMArrayType>()) {
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Type targetType = typeConverter->convertType(resultType);
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if (targetBits < sourceBits)
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rewriter.replaceOpWithNewOp<LLVM::TruncOp>(op, targetType,
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adaptor.getIn());
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else
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rewriter.replaceOpWithNewOp<LLVM::SExtOp>(op, targetType,
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adaptor.getIn());
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return success();
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}
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if (!resultType.isa<VectorType>())
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return rewriter.notifyMatchFailure(op, "expected vector result type");
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return LLVM::detail::handleMultidimensionalVectors(
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op.getOperation(), adaptor.getOperands(), *getTypeConverter(),
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[&](Type llvm1DVectorTy, ValueRange operands) -> Value {
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OpAdaptor adaptor(operands);
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if (targetBits < sourceBits) {
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return rewriter.create<LLVM::TruncOp>(op.getLoc(), llvm1DVectorTy,
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adaptor.getIn());
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}
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return rewriter.create<LLVM::SExtOp>(op.getLoc(), llvm1DVectorTy,
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adaptor.getIn());
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},
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rewriter);
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}
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//===----------------------------------------------------------------------===//
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// AddUICarryOpLowering
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//===----------------------------------------------------------------------===//
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LogicalResult AddUICarryOpLowering::matchAndRewrite(
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arith::AddUICarryOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const {
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Type operandType = adaptor.getLhs().getType();
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Type sumResultType = op.getSum().getType();
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Type carryResultType = op.getCarry().getType();
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if (!LLVM::isCompatibleType(operandType))
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return failure();
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MLIRContext *ctx = rewriter.getContext();
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Location loc = op.getLoc();
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// Handle the scalar and 1D vector cases.
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if (!operandType.isa<LLVM::LLVMArrayType>()) {
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Type newCarryType = typeConverter->convertType(carryResultType);
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Type structType =
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LLVM::LLVMStructType::getLiteral(ctx, {sumResultType, newCarryType});
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Value addOverflow = rewriter.create<LLVM::UAddWithOverflowOp>(
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loc, structType, adaptor.getLhs(), adaptor.getRhs());
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Value sumExtracted =
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rewriter.create<LLVM::ExtractValueOp>(loc, addOverflow, 0);
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Value carryExtracted =
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rewriter.create<LLVM::ExtractValueOp>(loc, addOverflow, 1);
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rewriter.replaceOp(op, {sumExtracted, carryExtracted});
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return success();
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}
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if (!sumResultType.isa<VectorType>())
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return rewriter.notifyMatchFailure(loc, "expected vector result types");
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return rewriter.notifyMatchFailure(loc,
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"ND vector types are not supported yet");
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}
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//===----------------------------------------------------------------------===//
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// CmpIOpLowering
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//===----------------------------------------------------------------------===//
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// Convert arith.cmp predicate into the LLVM dialect CmpPredicate. The two enums
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// share numerical values so just cast.
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template <typename LLVMPredType, typename PredType>
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static LLVMPredType convertCmpPredicate(PredType pred) {
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return static_cast<LLVMPredType>(pred);
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}
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LogicalResult
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CmpIOpLowering::matchAndRewrite(arith::CmpIOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const {
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Type operandType = adaptor.getLhs().getType();
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Type resultType = op.getResult().getType();
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// Handle the scalar and 1D vector cases.
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if (!operandType.isa<LLVM::LLVMArrayType>()) {
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rewriter.replaceOpWithNewOp<LLVM::ICmpOp>(
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op, typeConverter->convertType(resultType),
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convertCmpPredicate<LLVM::ICmpPredicate>(op.getPredicate()),
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adaptor.getLhs(), adaptor.getRhs());
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return success();
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}
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if (!resultType.isa<VectorType>())
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return rewriter.notifyMatchFailure(op, "expected vector result type");
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return LLVM::detail::handleMultidimensionalVectors(
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op.getOperation(), adaptor.getOperands(), *getTypeConverter(),
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[&](Type llvm1DVectorTy, ValueRange operands) {
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OpAdaptor adaptor(operands);
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return rewriter.create<LLVM::ICmpOp>(
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op.getLoc(), llvm1DVectorTy,
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convertCmpPredicate<LLVM::ICmpPredicate>(op.getPredicate()),
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adaptor.getLhs(), adaptor.getRhs());
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},
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rewriter);
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}
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//===----------------------------------------------------------------------===//
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// CmpFOpLowering
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//===----------------------------------------------------------------------===//
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LogicalResult
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CmpFOpLowering::matchAndRewrite(arith::CmpFOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const {
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Type operandType = adaptor.getLhs().getType();
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Type resultType = op.getResult().getType();
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// Handle the scalar and 1D vector cases.
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if (!operandType.isa<LLVM::LLVMArrayType>()) {
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rewriter.replaceOpWithNewOp<LLVM::FCmpOp>(
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op, typeConverter->convertType(resultType),
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convertCmpPredicate<LLVM::FCmpPredicate>(op.getPredicate()),
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adaptor.getLhs(), adaptor.getRhs());
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return success();
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}
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if (!resultType.isa<VectorType>())
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return rewriter.notifyMatchFailure(op, "expected vector result type");
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return LLVM::detail::handleMultidimensionalVectors(
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op.getOperation(), adaptor.getOperands(), *getTypeConverter(),
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[&](Type llvm1DVectorTy, ValueRange operands) {
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OpAdaptor adaptor(operands);
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return rewriter.create<LLVM::FCmpOp>(
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op.getLoc(), llvm1DVectorTy,
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convertCmpPredicate<LLVM::FCmpPredicate>(op.getPredicate()),
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adaptor.getLhs(), adaptor.getRhs());
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},
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rewriter);
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}
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//===----------------------------------------------------------------------===//
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// Pass Definition
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//===----------------------------------------------------------------------===//
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namespace {
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struct ConvertArithmeticToLLVMPass
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: public impl::ConvertArithmeticToLLVMBase<ConvertArithmeticToLLVMPass> {
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ConvertArithmeticToLLVMPass() = default;
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void runOnOperation() override {
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LLVMConversionTarget target(getContext());
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RewritePatternSet patterns(&getContext());
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LowerToLLVMOptions options(&getContext());
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if (indexBitwidth != kDeriveIndexBitwidthFromDataLayout)
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options.overrideIndexBitwidth(indexBitwidth);
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LLVMTypeConverter converter(&getContext(), options);
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mlir::arith::populateArithmeticToLLVMConversionPatterns(converter,
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patterns);
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if (failed(applyPartialConversion(getOperation(), target,
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std::move(patterns))))
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signalPassFailure();
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}
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};
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} // namespace
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//===----------------------------------------------------------------------===//
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// Pattern Population
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//===----------------------------------------------------------------------===//
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void mlir::arith::populateArithmeticToLLVMConversionPatterns(
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LLVMTypeConverter &converter, RewritePatternSet &patterns) {
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// clang-format off
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patterns.add<
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AddFOpLowering,
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AddIOpLowering,
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AndIOpLowering,
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AddUICarryOpLowering,
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BitcastOpLowering,
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ConstantOpLowering,
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CmpFOpLowering,
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CmpIOpLowering,
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DivFOpLowering,
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DivSIOpLowering,
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DivUIOpLowering,
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ExtFOpLowering,
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ExtSIOpLowering,
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ExtUIOpLowering,
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FPToSIOpLowering,
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FPToUIOpLowering,
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IndexCastOpLowering,
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MaxFOpLowering,
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MaxSIOpLowering,
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MaxUIOpLowering,
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MinFOpLowering,
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MinSIOpLowering,
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MinUIOpLowering,
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MulFOpLowering,
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MulIOpLowering,
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NegFOpLowering,
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OrIOpLowering,
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RemFOpLowering,
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RemSIOpLowering,
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RemUIOpLowering,
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SelectOpLowering,
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ShLIOpLowering,
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ShRSIOpLowering,
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ShRUIOpLowering,
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SIToFPOpLowering,
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SubFOpLowering,
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SubIOpLowering,
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TruncFOpLowering,
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TruncIOpLowering,
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UIToFPOpLowering,
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XOrIOpLowering
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>(converter);
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// clang-format on
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}
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std::unique_ptr<Pass> mlir::arith::createConvertArithmeticToLLVMPass() {
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return std::make_unique<ConvertArithmeticToLLVMPass>();
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}
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