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This class represents a rewrite pattern list that has been frozen, and thus immutable. This replaces the uses of OwningRewritePatternList in pattern driver related API, such as dialect conversion. When PDL becomes more prevalent, this API will allow for optimizing a set of patterns once without the need to do this per run of a pass. Differential Revision: https://reviews.llvm.org/D89104
124 lines
5.6 KiB
C++
124 lines
5.6 KiB
C++
//===- LowerGpuOpsToROCDLOps.cpp - MLIR GPU to ROCDL lowering passes ------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a pass to generate ROCDLIR operations for higher-level
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// GPU operations.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
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#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
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#include "mlir/Conversion/VectorToROCDL/VectorToROCDL.h"
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#include "mlir/Dialect/GPU/GPUDialect.h"
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#include "mlir/Dialect/GPU/Passes.h"
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/Dialect/Vector/VectorOps.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
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#include "llvm/Support/FormatVariadic.h"
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#include "../GPUCommon/GPUOpsLowering.h"
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#include "../GPUCommon/IndexIntrinsicsOpLowering.h"
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#include "../GPUCommon/OpToFuncCallLowering.h"
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#include "../PassDetail.h"
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using namespace mlir;
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namespace {
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/// Import the GPU Ops to ROCDL Patterns.
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#include "GPUToROCDL.cpp.inc"
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// A pass that replaces all occurrences of GPU device operations with their
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// corresponding ROCDL equivalent.
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//
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// This pass only handles device code and is not meant to be run on GPU host
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// code.
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struct LowerGpuOpsToROCDLOpsPass
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: public ConvertGpuOpsToROCDLOpsBase<LowerGpuOpsToROCDLOpsPass> {
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LowerGpuOpsToROCDLOpsPass() = default;
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LowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth) {
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this->indexBitwidth = indexBitwidth;
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}
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void runOnOperation() override {
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gpu::GPUModuleOp m = getOperation();
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/// Customize the bitwidth used for the device side index computations.
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LowerToLLVMOptions options = {/*useBarePtrCallConv =*/false,
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/*emitCWrappers =*/true,
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/*indexBitwidth =*/indexBitwidth,
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/*useAlignedAlloc =*/false};
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LLVMTypeConverter converter(m.getContext(), options);
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OwningRewritePatternList patterns, llvmPatterns;
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populateGpuRewritePatterns(m.getContext(), patterns);
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applyPatternsAndFoldGreedily(m, std::move(patterns));
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populateVectorToLLVMConversionPatterns(converter, llvmPatterns);
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populateVectorToROCDLConversionPatterns(converter, llvmPatterns);
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populateStdToLLVMConversionPatterns(converter, llvmPatterns);
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populateGpuToROCDLConversionPatterns(converter, llvmPatterns);
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LLVMConversionTarget target(getContext());
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target.addIllegalDialect<gpu::GPUDialect>();
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target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp,
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LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op,
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LLVM::Log2Op>();
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target.addIllegalOp<FuncOp>();
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target.addLegalDialect<ROCDL::ROCDLDialect>();
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// TODO: Remove once we support replacing non-root ops.
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target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>();
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if (failed(applyPartialConversion(m, target, std::move(llvmPatterns))))
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signalPassFailure();
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}
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};
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} // anonymous namespace
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void mlir::populateGpuToROCDLConversionPatterns(
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LLVMTypeConverter &converter, OwningRewritePatternList &patterns) {
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populateWithGenerated(converter.getDialect()->getContext(), patterns);
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patterns.insert<
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GPUIndexIntrinsicOpLowering<gpu::ThreadIdOp, ROCDL::ThreadIdXOp,
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ROCDL::ThreadIdYOp, ROCDL::ThreadIdZOp>,
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GPUIndexIntrinsicOpLowering<gpu::BlockDimOp, ROCDL::BlockDimXOp,
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ROCDL::BlockDimYOp, ROCDL::BlockDimZOp>,
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GPUIndexIntrinsicOpLowering<gpu::BlockIdOp, ROCDL::BlockIdXOp,
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ROCDL::BlockIdYOp, ROCDL::BlockIdZOp>,
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GPUIndexIntrinsicOpLowering<gpu::GridDimOp, ROCDL::GridDimXOp,
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ROCDL::GridDimYOp, ROCDL::GridDimZOp>,
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GPUFuncOpLowering<5>, GPUReturnOpLowering>(converter);
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patterns.insert<OpToFuncCallLowering<AbsFOp>>(converter, "__ocml_fabs_f32",
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"__ocml_fabs_f64");
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patterns.insert<OpToFuncCallLowering<CeilFOp>>(converter, "__ocml_ceil_f32",
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"__ocml_ceil_f64");
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patterns.insert<OpToFuncCallLowering<CosOp>>(converter, "__ocml_cos_f32",
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"__ocml_cos_f64");
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patterns.insert<OpToFuncCallLowering<ExpOp>>(converter, "__ocml_exp_f32",
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"__ocml_exp_f64");
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patterns.insert<OpToFuncCallLowering<FloorFOp>>(converter, "__ocml_floor_f32",
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"__ocml_floor_f64");
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patterns.insert<OpToFuncCallLowering<LogOp>>(converter, "__ocml_log_f32",
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"__ocml_log_f64");
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patterns.insert<OpToFuncCallLowering<Log10Op>>(converter, "__ocml_log10_f32",
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"__ocml_log10_f64");
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patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32",
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"__ocml_log2_f64");
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patterns.insert<OpToFuncCallLowering<TanhOp>>(converter, "__ocml_tanh_f32",
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"__ocml_tanh_f64");
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}
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std::unique_ptr<OperationPass<gpu::GPUModuleOp>>
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mlir::createLowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth) {
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return std::make_unique<LowerGpuOpsToROCDLOpsPass>(indexBitwidth);
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}
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