See the following case:
```
define i32 @src1(i32 %x) {
%dec = sub nuw i32 -2, %x
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%sub = sub nsw i32 32, %ctlz
%shl = shl i32 1, %sub
%ugt = icmp ult i32 %x, -2
%sel = select i1 %ugt, i32 %shl, i32 1
ret i32 %sel
}
define i32 @tgt1(i32 %x) {
%dec = sub nuw i32 -2, %x
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%sub = sub nsw i32 32, %ctlz
%and = and i32 %sub, 31
%shl = shl nuw i32 1, %and
ret i32 %shl
}
```
`nuw` in `%dec` should be dropped after the select instruction is
eliminated.
Alive2: https://alive2.llvm.org/ce/z/7S9529
Fixes https://github.com/llvm/llvm-project/issues/91691.
156 KiB
156 KiB