80267f8148
The recently announced IBM z17 processor implements the architecture already supported as "arch15" in LLVM. This patch adds support for "z17" as an alternate architecture name for arch15. This patch also add the scheduler description for the z17 processor, provided by Jonas Paulsson.
46 lines
1.3 KiB
LLVM
46 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; Test incoming i128 arguments.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s
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; Do some arithmetic so that we can see the register being used.
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define void @f1(ptr %r2, i16 %r3, i32 %r4, i64 %r5, i128 %r6) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r6), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%y = add i128 %r6, %r6
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store i128 %y, ptr %r2
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ret void
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}
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; Test a case where the i128 address is passed on the stack.
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define void @f2(ptr %r2, i16 %r3, i32 %r4, i64 %r5, i128 %r6, i64 %s1, i64 %s2, i128 %s4) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lg %r1, 176(%r15)
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; CHECK-NEXT: vl %v0, 0(%r1), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%y = add i128 %s4, %s4
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store i128 %y, ptr %r2
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ret void
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}
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; Explicit i128 return values are likewise passed indirectly.
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define i128 @f14(i128 %r3) {
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; CHECK-LABEL: f14:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r3), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%y = add i128 %r3, %r3
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ret i128 %y
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}
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