According to https://developer.arm.com/documentation/102105/latest Arm Architecture Reference Manual for A-profile architecture: Known issues 2.206 D22789 In section C5.2.25 "SSBS, Speculative Store Bypass Safe", under the heading 'Configurations', the text that reads: "This register is present only when FEAT_SSBS is implemented. Otherwise, direct accesses to SSBS are UNDEFINED." is changed to read: "This register is present only when FEAT_SSBS2 is implemented. Otherwise, direct accesses to SSBS are UNDEFINED." This suggests that it's not worth splitting FEAT_SSBS2 from FEAT_SSBS in the compiler, since FEAT_SSBS cannot be used for predicating the MRS/MSR instructions. Those can access PSTATE.SSBS only when FEAT_SSBS2 is available. Moreover, there are no hardware implementations which implement FEAT_SSBS without FEAT_SSBS2, therefore unifying these features in the specification should not be a regression for feature detection. Approved in ACLE as https://github.com/ARM-software/acle/pull/350
The LLVM Compiler Infrastructure
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