ca79ff07d8
Reverts llvm/llvm-project#118734 There are currently some specific versions of MSVC that are miscompiling this code (we think). We don't know why as all the other build bots and at least some folks' local Windows builds work fine. This is a candidate revert to help the relevant folks catch their builders up and have time to debug the issue. However, the expectation is to roll forward at some point with a workaround if at all possible.
258 lines
6.8 KiB
C++
258 lines
6.8 KiB
C++
//===--- M68k.cpp - Implement M68k targets feature support-------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements M68k TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#include "M68k.h"
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#include "clang/Basic/Builtins.h"
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#include "clang/Basic/Diagnostic.h"
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#include "clang/Basic/TargetBuiltins.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/TargetParser/TargetParser.h"
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#include <cstdint>
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#include <cstring>
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#include <limits>
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#include <optional>
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namespace clang {
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namespace targets {
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M68kTargetInfo::M68kTargetInfo(const llvm::Triple &Triple,
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const TargetOptions &Opts)
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: TargetInfo(Triple), TargetOpts(Opts) {
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std::string Layout;
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// M68k is Big Endian
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Layout += "E";
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// FIXME how to wire it with the used object format?
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Layout += "-m:e";
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// M68k pointers are always 32 bit wide even for 16-bit CPUs
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Layout += "-p:32:16:32";
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// M68k integer data types
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Layout += "-i8:8:8-i16:16:16-i32:16:32";
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// FIXME no floats at the moment
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// The registers can hold 8, 16, 32 bits
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Layout += "-n8:16:32";
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// 16 bit alignment for both stack and aggregate
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// in order to conform to ABI used by GCC
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Layout += "-a:0:16-S16";
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resetDataLayout(Layout);
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SizeType = UnsignedInt;
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PtrDiffType = SignedInt;
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IntPtrType = SignedInt;
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}
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bool M68kTargetInfo::setCPU(const std::string &Name) {
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StringRef N = Name;
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CPU = llvm::StringSwitch<CPUKind>(N)
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.Case("generic", CK_68000)
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.Case("M68000", CK_68000)
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.Case("M68010", CK_68010)
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.Case("M68020", CK_68020)
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.Case("M68030", CK_68030)
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.Case("M68040", CK_68040)
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.Case("M68060", CK_68060)
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.Default(CK_Unknown);
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return CPU != CK_Unknown;
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}
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void M68kTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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using llvm::Twine;
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Builder.defineMacro("__m68k__");
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DefineStd(Builder, "mc68000", Opts);
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// For sub-architecture
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switch (CPU) {
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case CK_68010:
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DefineStd(Builder, "mc68010", Opts);
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break;
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case CK_68020:
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DefineStd(Builder, "mc68020", Opts);
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break;
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case CK_68030:
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DefineStd(Builder, "mc68030", Opts);
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break;
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case CK_68040:
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DefineStd(Builder, "mc68040", Opts);
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break;
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case CK_68060:
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DefineStd(Builder, "mc68060", Opts);
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break;
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default:
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break;
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}
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if (CPU >= CK_68020) {
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
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}
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// Floating point
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if (TargetOpts.FeatureMap.lookup("isa-68881") ||
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TargetOpts.FeatureMap.lookup("isa-68882"))
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Builder.defineMacro("__HAVE_68881__");
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}
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ArrayRef<Builtin::Info> M68kTargetInfo::getTargetBuiltins() const {
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// FIXME: Implement.
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return {};
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}
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bool M68kTargetInfo::hasFeature(StringRef Feature) const {
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// FIXME elaborate moar
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return Feature == "M68000";
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}
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const char *const M68kTargetInfo::GCCRegNames[] = {
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"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
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"a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp",
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"pc"};
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ArrayRef<const char *> M68kTargetInfo::getGCCRegNames() const {
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return llvm::ArrayRef(GCCRegNames);
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}
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const TargetInfo::GCCRegAlias M68kTargetInfo::GCCRegAliases[] = {
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{{"bp"}, "a5"},
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{{"fp"}, "a6"},
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{{"usp", "ssp", "isp", "a7"}, "sp"},
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};
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ArrayRef<TargetInfo::GCCRegAlias> M68kTargetInfo::getGCCRegAliases() const {
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return llvm::ArrayRef(GCCRegAliases);
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}
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bool M68kTargetInfo::validateAsmConstraint(
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const char *&Name, TargetInfo::ConstraintInfo &info) const {
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switch (*Name) {
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case 'a': // address register
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case 'd': // data register
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info.setAllowsRegister();
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return true;
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case 'I': // constant integer in the range [1,8]
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info.setRequiresImmediate(1, 8);
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return true;
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case 'J': // constant signed 16-bit integer
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info.setRequiresImmediate(std::numeric_limits<int16_t>::min(),
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std::numeric_limits<int16_t>::max());
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return true;
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case 'K': // constant that is NOT in the range of [-0x80, 0x80)
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info.setRequiresImmediate();
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return true;
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case 'L': // constant integer in the range [-8,-1]
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info.setRequiresImmediate(-8, -1);
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return true;
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case 'M': // constant that is NOT in the range of [-0x100, 0x100]
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info.setRequiresImmediate();
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return true;
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case 'N': // constant integer in the range [24,31]
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info.setRequiresImmediate(24, 31);
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return true;
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case 'O': // constant integer 16
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info.setRequiresImmediate(16);
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return true;
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case 'P': // constant integer in the range [8,15]
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info.setRequiresImmediate(8, 15);
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return true;
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case 'C':
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++Name;
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switch (*Name) {
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case '0': // constant integer 0
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info.setRequiresImmediate(0);
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return true;
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case 'i': // constant integer
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case 'j': // integer constant that doesn't fit in 16 bits
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info.setRequiresImmediate();
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return true;
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default:
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break;
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}
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break;
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case 'Q': // address register indirect addressing
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case 'U': // address register indirect w/ constant offset addressing
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// TODO: Handle 'S' (basically 'm' when pc-rel is enforced) when
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// '-mpcrel' flag is properly handled by the driver.
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info.setAllowsMemory();
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return true;
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default:
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break;
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}
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return false;
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}
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std::optional<std::string>
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M68kTargetInfo::handleAsmEscapedChar(char EscChar) const {
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char C;
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switch (EscChar) {
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case '.':
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case '#':
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C = EscChar;
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break;
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case '/':
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C = '%';
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break;
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case '$':
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C = 's';
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break;
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case '&':
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C = 'd';
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break;
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default:
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return std::nullopt;
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}
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return std::string(1, C);
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}
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std::string M68kTargetInfo::convertConstraint(const char *&Constraint) const {
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if (*Constraint == 'C')
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// Two-character constraint; add "^" hint for later parsing
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return std::string("^") + std::string(Constraint++, 2);
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return std::string(1, *Constraint);
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}
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std::string_view M68kTargetInfo::getClobbers() const {
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// FIXME: Is this really right?
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return "";
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}
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TargetInfo::BuiltinVaListKind M68kTargetInfo::getBuiltinVaListKind() const {
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return TargetInfo::VoidPtrBuiltinVaList;
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}
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TargetInfo::CallingConvCheckResult
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M68kTargetInfo::checkCallingConvention(CallingConv CC) const {
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switch (CC) {
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case CC_C:
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case CC_M68kRTD:
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return CCCR_OK;
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default:
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return TargetInfo::checkCallingConvention(CC);
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}
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}
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} // namespace targets
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} // namespace clang
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