yingopq 677177bb60 [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (#91449) ...

Fix issue1: In mips1-4, require a minimum of 2 instructions between a
mflo/mfhi and the next mul/dmult/div/ddiv/divu/ddivu instruction.
Fix issue2: In mips1-4, should not put mflo into the delay slot for the
return.

Fix https://github.com/llvm/llvm-project/issues/81291

2024-09-23 19:07:13 +08:00

31 KiB

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