ac0f64f06d
Allocating wwm-registers and per-thread VGPR operands together imposes many challenges in the way the registers are reused during allocation. There are times when regalloc reuses the registers of regular VGPRs operations for wwm-operations in a small range leading to unwantedly clobbering their inactive lanes causing correctness issues that are hard to trace. This patch splits the VGPR allocation pipeline further to allocate wwm-registers first and the regular VGPR operands in a separate pipeline. The splitting would ensure that the physical registers used for wwm allocations won't take part in the next allocation pipeline to avoid any such clobbering.
59 lines
3.7 KiB
LLVM
59 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -stop-after=si-insert-waitcnts -verify-machineinstrs < %s | FileCheck %s
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declare fastcc void @bar()
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define fastcc i32 @foo() {
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; CHECK-LABEL: name: foo
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; CHECK: bb.0 (%ir-block.0):
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: S_WAITCNT 0
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; CHECK-NEXT: $sgpr16 = S_MOV_B32 $sgpr33
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; CHECK-NEXT: $sgpr33 = S_MOV_B32 $sgpr32
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; CHECK-NEXT: $sgpr17 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
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; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr17
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; CHECK-NEXT: $sgpr32 = frame-setup S_ADDK_I32 $sgpr32, 512, implicit-def dead $scc
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; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr16, 2, undef $vgpr40
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; CHECK-NEXT: BUNDLE implicit-def $sgpr16_sgpr17, implicit-def $sgpr16, implicit-def $sgpr16_lo16, implicit-def $sgpr16_hi16, implicit-def $sgpr17, implicit-def $sgpr17_lo16, implicit-def $sgpr17_hi16, implicit-def $scc {
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; CHECK-NEXT: $sgpr16_sgpr17 = S_GETPC_B64
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; CHECK-NEXT: $sgpr16 = S_ADD_U32 internal $sgpr16, target-flags(amdgpu-gotprel32-lo) @bar + 4, implicit-def $scc
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; CHECK-NEXT: $sgpr17 = S_ADDC_U32 internal $sgpr17, target-flags(amdgpu-gotprel32-hi) @bar + 12, implicit-def $scc, implicit internal $scc
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; CHECK-NEXT: }
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; CHECK-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
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; CHECK-NEXT: BUFFER_GL1_INV implicit $exec
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; CHECK-NEXT: BUFFER_GL0_INV implicit $exec
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; CHECK-NEXT: renamable $sgpr16_sgpr17 = S_LOAD_DWORDX2_IMM killed renamable $sgpr16_sgpr17, 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
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; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr40
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; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr31, 1, $vgpr40
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; CHECK-NEXT: S_WAITCNT 49279
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; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, @bar, csr_amdgpu, implicit killed $sgpr4_sgpr5, implicit killed $sgpr6_sgpr7, implicit killed $sgpr8_sgpr9, implicit killed $sgpr10_sgpr11, implicit killed $sgpr12, implicit killed $sgpr13, implicit killed $sgpr14, implicit killed $sgpr15, implicit killed $vgpr31, implicit $sgpr0_sgpr1_sgpr2_sgpr3
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; CHECK-NEXT: $vcc_lo = S_MOV_B32 $exec_lo
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1 (%ir-block.1):
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; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.1(0x7c000000)
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; CHECK-NEXT: liveins: $vcc_lo
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc_lo
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2.DummyReturnBlock:
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; CHECK-NEXT: $sgpr31 = V_READLANE_B32 $vgpr40, 1
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; CHECK-NEXT: $sgpr30 = V_READLANE_B32 $vgpr40, 0
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; CHECK-NEXT: $sgpr4 = V_READLANE_B32 $vgpr40, 2
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; CHECK-NEXT: $sgpr5 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: $vgpr40 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (load (s32) from %stack.2, addrspace 5)
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; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr5
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; CHECK-NEXT: $sgpr32 = frame-destroy S_ADDK_I32 $sgpr32, -512, implicit-def dead $scc
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; CHECK-NEXT: $sgpr33 = S_MOV_B32 killed $sgpr4
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; CHECK-NEXT: S_WAITCNT 16240
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; CHECK-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31, implicit undef $vgpr0
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fence acquire
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call fastcc void @bar()
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br label %1
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1:
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br label %1
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}
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