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clang-p2996/llvm/lib/Target/AMDGPU
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Ivan Kosarev 4b9dbbdb09 [AMDGPU][MC][NFC] Refine SMEM load definitions. 
Reviewed By: dp

Differential Revision: https://reviews.llvm.org/D130009
2022-07-21 14:56:56 +01:00
..
AsmParser
[AMDGPU] Remove old operand from VOPC DPP
2022-07-19 09:35:05 -04:00
Disassembler
[AMDGPU] Add the uses_dynamic_stack field to the kernel descriptor and the kernel metadata map
2022-07-18 10:07:13 +05:30
MCA
[MCA] Introducing incremental SourceMgr and resumable pipeline
2022-06-24 15:39:51 -07:00
MCTargetDesc
[AMDGPU] Remove old operand from VOPC DPP
2022-07-19 09:35:05 -04:00
TargetInfo
…
Utils
[nfc][amdgpu] LDS. Move selection logic up the stack.
2022-07-19 17:20:19 +01:00
AMDGPU.h
[AMDGPU] gfx11 Generate VOPD Instructions
2022-07-05 09:18:19 -04:00
AMDGPU.td
AMDGPU: Refine user-sgpr-init16-bug
2022-07-21 08:57:00 -04:00
AMDGPUAliasAnalysis.cpp
…
AMDGPUAliasAnalysis.h
[Target] Remove redundant member initialization (NFC)
2022-01-06 22:01:44 -08:00
AMDGPUAlwaysInlinePass.cpp
…
AMDGPUAnnotateKernelFeatures.cpp
…
AMDGPUAnnotateUniformValues.cpp
[AMDGPU] Return better Changed status from AMDGPUAnnotateUniformValues
2022-02-17 09:31:42 +00:00
AMDGPUArgumentUsageInfo.cpp
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
AMDGPUArgumentUsageInfo.h
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
AMDGPUAsmPrinter.cpp
[AMDGPU] Add the uses_dynamic_stack field to the kernel descriptor and the kernel metadata map
2022-07-18 10:07:13 +05:30
AMDGPUAsmPrinter.h
[AMDGPU] Add remarks to output some resource usage
2022-07-15 11:01:53 -07:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU] Add GFX11 llvm.amdgcn.permlane64 intrinsic
2022-06-13 21:12:11 +01:00
AMDGPUAttributes.def
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
AMDGPUAttributor.cpp
[Attributor] Replace AAValueSimplify with AAPotentialValues
2022-07-19 16:24:42 -05:00
AMDGPUCallingConv.td
[AMDGPU][NFC] Refactor AMDGPUCallingConv.td
2022-06-01 16:24:09 +00:00
AMDGPUCallLowering.cpp
Use value instead of getValue (NFC)
2022-07-19 21:18:26 -07:00
AMDGPUCallLowering.h
…
AMDGPUCodeGenPrepare.cpp
[AMDGPUCodeGenPrepare] Check result of ConstantFoldBinaryOpOperands()
2022-07-04 14:20:23 +02:00
AMDGPUCombine.td
AMDGPU/GlobalISel: Add clamp combine
2021-12-03 12:49:39 +01:00
AMDGPUCombinerHelper.cpp
[AMDGPU][GlobalISel] Fix insert point in FoldableFneg combine
2022-02-11 12:09:40 +01:00
AMDGPUCombinerHelper.h
[AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods
2021-11-17 14:25:13 +01:00
AMDGPUCtorDtorLowering.cpp
AMDGPU: Don't crash on global_ctor/dtor declaration
2022-06-23 21:04:54 +08:00
AMDGPUExportClustering.cpp
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUExportClustering.h
…
AMDGPUFeatures.td
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
…
AMDGPUGISel.td
[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.
2022-07-18 11:29:31 +01:00
AMDGPUGlobalISelUtils.cpp
[AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type
2022-06-23 11:05:32 -04:00
AMDGPUGlobalISelUtils.h
[AMDGPU] gfx11 Select on Buffer Atomic FAdd Rtn type
2022-06-23 11:05:32 -04:00
AMDGPUHSAMetadataStreamer.cpp
[AMDGPU] Add the uses_dynamic_stack field to the kernel descriptor and the kernel metadata map
2022-07-18 10:07:13 +05:30
AMDGPUHSAMetadataStreamer.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUIGroupLP.cpp
Don't use Optional::hasValue (NFC)
2022-06-20 20:05:16 -07:00
AMDGPUIGroupLP.h
[AMDGPU] Add more expressive sched_barrier controls
2022-06-14 22:03:05 -07:00
AMDGPUInsertDelayAlu.cpp
[AMDGPU] New AMDGPUInsertDelayAlu pass
2022-06-29 21:30:20 +01:00
AMDGPUInstCombineIntrinsic.cpp
[AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row
2022-06-16 18:23:14 +01:00
AMDGPUInstrInfo.cpp
…
AMDGPUInstrInfo.h
[AMDGPU] Fix LOD bias in A16 combine
2022-01-21 12:09:06 +01:00
AMDGPUInstrInfo.td
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
AMDGPUInstructions.td
[AMDGPU] Use the HasNoUse predicate for no-ret atomic op selection
2022-07-08 09:47:33 +05:30
AMDGPUInstructionSelector.cpp
[AMDGPU][NFC] Validate G_MERGE_VALUES as we match zero-extended 32-bit scalars.
2022-07-21 14:49:57 +01:00
AMDGPUInstructionSelector.h
[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.
2022-07-18 11:29:31 +01:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.
2022-07-18 11:29:31 +01:00
AMDGPUISelDAGToDAG.h
[AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.
2022-07-18 11:29:31 +01:00
AMDGPUISelLowering.cpp
[LLVM] Add the support for fmax and fmin in atomicrmw instruction
2022-07-06 10:57:53 -04:00
AMDGPUISelLowering.h
AMDGPU: Use the implicit kernargs for code object version 5
2022-03-17 14:12:36 -07:00
AMDGPULateCodeGenPrepare.cpp
…
AMDGPULegalizerInfo.cpp
Use value instead of getValue (NFC)
2022-07-19 21:18:26 -07:00
AMDGPULegalizerInfo.h
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
AMDGPULibCalls.cpp
[AMDGPU] Declare TableRef in terms of ArrayRef (NFC)
2022-07-16 10:56:20 -07:00
AMDGPULibFunc.cpp
Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
2022-01-26 16:55:53 +01:00
AMDGPULibFunc.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPULowerIntrinsics.cpp
[iwyu] Handle regressions in libLLVM header include
2022-05-04 08:32:38 +02:00
AMDGPULowerKernelArguments.cpp
[NFC] Simplify code
2022-06-20 15:15:52 +00:00
AMDGPULowerKernelAttributes.cpp
AMDGPU: Update reqd-work-group-size optimization for umin intrinsic
2022-04-12 20:03:02 -04:00
AMDGPULowerModuleLDSPass.cpp
[nfc][amdgpu] LDS. Move selection logic up the stack.
2022-07-19 17:20:19 +01:00
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPUMachineFunction.cpp
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
AMDGPUMachineFunction.h
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
AMDGPUMachineModuleInfo.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
AMDGPUMachineModuleInfo.h
[llvm] Use value instead of getValue (NFC)
2022-07-13 23:11:56 -07:00
AMDGPUMacroFusion.cpp
…
AMDGPUMacroFusion.h
…
AMDGPUMCInstLower.cpp
[CodeGen] Move instruction predicate verification to emitInstruction
2022-07-14 09:33:28 +01:00
AMDGPUMCInstLower.h
AMDGPU: Fix missing c++ mode comment
2022-06-01 21:14:48 -04:00
AMDGPUMIRFormatter.cpp
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
2022-06-01 09:45:40 -04:00
AMDGPUMIRFormatter.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
[NFC] Remove unnecessary "#include"s from header files
2022-02-23 01:20:48 -08:00
AMDGPUPerfHintAnalysis.cpp
[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access
2022-07-19 15:16:28 +05:30
AMDGPUPerfHintAnalysis.h
[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access
2022-07-19 15:16:28 +05:30
AMDGPUPostLegalizerCombiner.cpp
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
AMDGPUPreLegalizerCombiner.cpp
AMDGPU: Remove redundant call to MachineInstrBuilder::setMBB
2022-05-03 07:49:20 -05:00
AMDGPUPrintfRuntimeBinding.cpp
[NFC] format InstructionSimplify & lowerCaseFunctionNames
2022-06-09 16:10:08 +02:00
AMDGPUPromoteAlloca.cpp
Use llvm::less_second (NFC)
2022-06-04 22:48:32 -07:00
AMDGPUPromoteKernelArguments.cpp
[AMDGPU] Set noclobber metadata on loads instead of cast to constant
2022-03-07 23:13:02 -08:00
AMDGPUPropagateAttributes.cpp
…
AMDGPUPTNote.h
[NFC] Fix endif comments to match with include guard
2022-01-07 15:52:59 +08:00
AMDGPURegBankCombiner.cpp
[AMDGPU][GlobalISel] Fix subtarget checks for combining to v_med3_i16
2022-07-21 11:41:31 +01:00
AMDGPURegisterBankInfo.cpp
[AMDGPU] Support for gfx940 fp8 smfmac
2022-07-18 12:12:41 -07:00
AMDGPURegisterBankInfo.h
AMDGPU: Add G_AMDGPU_MAD_64_32 instructions
2022-05-27 12:36:17 -05:00
AMDGPURegisterBanks.td
…
AMDGPUReleaseVGPRs.cpp
[AMDGPU] GFX11: automatically release VGPRs at the end of the shader
2022-06-30 20:55:14 +01:00
AMDGPUReplaceLDSUseWithPointer.cpp
[nfc][amdgpu] LDS. Move selection logic up the stack.
2022-07-19 17:20:19 +01:00
AMDGPUResourceUsageAnalysis.cpp
[AMDGPU] Define SGPR_NULL64 register. NFCI.
2022-06-13 13:23:33 -07:00
AMDGPUResourceUsageAnalysis.h
AMDGPU: Convert AMDGPUResourceUsageAnalysis to a Module pass
2022-02-04 15:56:04 -05:00
AMDGPURewriteOutArguments.cpp
[AMDGPURewriteOutArguments] Don't use pointer element type
2022-02-08 16:10:41 +01:00
AMDGPUSearchableTables.td
[AMDGPU] Support for gfx940 fp8 smfmac
2022-07-18 12:12:41 -07:00
AMDGPUSetWavePriority.cpp
[AMDGPU] Adjust wave priority based on VMEM instructions to avoid duty-cycling.
2022-04-27 14:37:18 +01:00
AMDGPUSubtarget.cpp
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
AMDGPUSubtarget.h
[AMDGPU] gfx11 subtarget features & early tests
2022-05-11 10:31:49 -04:00
AMDGPUTargetMachine.cpp
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
AMDGPUTargetMachine.h
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
2022-06-01 09:45:40 -04:00
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
Recommit "[SLP][TTI] Refactoring of getShuffleCost Args to work like getArithmeticInstrCost"
2022-04-26 14:02:40 -07:00
AMDGPUTargetTransformInfo.h
Recommit "[SLP][TTI] Refactoring of getShuffleCost Args to work like getArithmeticInstrCost"
2022-04-26 14:02:40 -07:00
AMDGPUUnifyDivergentExitNodes.cpp
…
AMDGPUUnifyMetadata.cpp
…
AMDKernelCodeT.h
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
BUFInstructions.td
[AMDGPU] Use AddedComplexity for ret and noret atomic ops selection
2022-07-08 09:47:33 +05:30
CaymanInstructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
CMakeLists.txt
[AMDGPU] gfx11 Generate VOPD Instructions
2022-07-05 09:18:19 -04:00
DSInstructions.td
[AMDGPU] Use AddedComplexity for ret and noret atomic ops selection
2022-07-08 09:47:33 +05:30
EvergreenInstructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
EXPInstructions.td
[AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row
2022-06-16 18:23:14 +01:00
FLATInstructions.td
[AMDGPU] Use AddedComplexity for ret and noret atomic ops selection
2022-07-08 09:47:33 +05:30
GCNCreateVOPD.cpp
[AMDGPU] gfx11 Generate VOPD Instructions
2022-07-05 09:18:19 -04:00
GCNDPPCombine.cpp
[NFC] Suppress unused variable warning in non-assert builds
2022-07-20 12:26:16 -07:00
GCNHazardRecognizer.cpp
[AMDGPU] gfx11 WMMA instruction support
2022-06-30 11:13:45 -04:00
GCNHazardRecognizer.h
[AMDGPU] gfx11 WMMA instruction support
2022-06-30 11:13:45 -04:00
GCNILPSched.cpp
…
GCNIterativeScheduler.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNIterativeScheduler.h
…
GCNMinRegStrategy.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNNSAReassign.cpp
[AMDGPU] GFX11 CodeGen support for MIMG instructions
2022-06-16 18:23:14 +01:00
GCNPreRAOptimizations.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNProcessors.td
AMDGPU: Refine user-sgpr-init16-bug
2022-07-21 08:57:00 -04:00
GCNRegPressure.cpp
[NFC] Use Register instead of unsigned
2022-01-19 20:17:04 +08:00
GCNRegPressure.h
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
GCNSchedStrategy.cpp
CodeGen: Remove AliasAnalysis from regalloc
2022-07-18 17:23:41 -04:00
GCNSchedStrategy.h
CodeGen: Remove AliasAnalysis from regalloc
2022-07-18 17:23:41 -04:00
GCNSubtarget.h
AMDGPU: Refine user-sgpr-init16-bug
2022-07-21 08:57:00 -04:00
GCNVOPDUtils.cpp
[AMDGPU] gfx11 Generate VOPD Instructions
2022-07-05 09:18:19 -04:00
GCNVOPDUtils.h
[AMDGPU] gfx11 Generate VOPD Instructions
2022-07-05 09:18:19 -04:00
InstCombineTables.td
…
LDSDIRInstructions.td
[AMDGPU] gfx11 ldsdir intrinsics and ISel
2022-06-17 09:03:16 -04:00
MIMGInstructions.td
[AMDGPU][MC][GFX1013] Enable image_msaa_load
2022-06-10 13:42:05 +03:00
R600.h
[AMDGPU] Rename AMDGPUCFGStructurizer to R600MachineCFGStructurizer
2022-02-18 15:08:25 +00:00
R600.td
…
R600AsmPrinter.cpp
[MC] De-capitalize SwitchSection. NFC
2022-06-10 22:50:55 -07:00
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600ControlFlowFinalizer.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600ExpandSpecialInstrs.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600FrameLowering.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600FrameLowering.h
…
R600InstrFormats.td
…
R600InstrInfo.cpp
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
2022-06-01 09:45:40 -04:00
R600InstrInfo.h
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
2022-06-01 09:45:40 -04:00
R600InstrInfo.td
…
R600Instructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
R600ISelDAGToDAG.cpp
…
R600ISelLowering.cpp
Fix -Warray-parameter warning
2022-07-09 17:04:01 +00:00
R600ISelLowering.h
R600ISelLowering.h: Silence a warning. [-Warray-parameter]
2022-07-10 18:29:55 +09:00
R600MachineCFGStructurizer.cpp
[AMDGPU] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds
2022-04-19 22:36:58 -07:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
[llvm] Use range-based for loops (NFC)
2021-12-11 11:29:12 -08:00
R600MachineScheduler.h
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
R600MCInstLower.cpp
[CodeGen] Move instruction predicate verification to emitInstruction
2022-07-14 09:33:28 +01:00
R600OpenCLImageTypeLoweringPass.cpp
[llvm] Use range-based for loops (NFC)
2021-12-11 11:29:12 -08:00
R600OptimizeVectorRegisters.cpp
[Target] Use range-based for loops (NFC)
2021-12-17 10:11:08 -08:00
R600Packetizer.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
R600Processors.td
…
R600RegisterInfo.cpp
Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
2022-01-26 16:55:53 +01:00
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
[AMDGPU] Use default member initializers in Subtarget classes
2022-04-12 16:42:30 +01:00
R600Subtarget.h
[AMDGPU] Use default member initializers in Subtarget classes
2022-04-12 16:42:30 +01:00
R600TargetMachine.cpp
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
R600TargetMachine.h
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
R600TargetTransformInfo.cpp
…
R600TargetTransformInfo.h
…
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[AMDGPU] Return better Changed status from SIAnnotateControlFlow
2022-02-17 09:38:57 +00:00
SIDefines.h
[AMDGPU] gfx11 WMMA instruction support
2022-06-30 11:13:45 -04:00
SIFixSGPRCopies.cpp
[AMDGPU] Lowering VGPR to SGPR copies to v_readfirstlane_b32 if profitable.
2022-07-14 23:59:02 +02:00
SIFixVGPRCopies.cpp
…
SIFoldOperands.cpp
[AMDGPU] Aggressively fold immediates in SIFoldOperands
2022-05-18 10:19:35 +01:00
SIFormMemoryClauses.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIFrameLowering.cpp
AMDGPU: Move SpilledReg from MFI to SIRegisterInfo
2022-06-02 17:11:24 -04:00
SIFrameLowering.h
[AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.
2022-04-21 07:57:26 +05:30
SIInsertHardClauses.cpp
[AMDGPU] Update SIInsertHardClauses for GFX11
2022-06-09 21:29:56 +01:00
SIInsertWaitcnts.cpp
[AMDGPU] Flush the vmcnt counter in loop preheaders when necessary
2022-06-23 10:53:21 -04:00
SIInstrFormats.td
[AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op_sel
2022-07-15 13:11:59 +03:00
SIInstrInfo.cpp
[AMDGPU] Remove old operand from VOPC DPP
2022-07-19 09:35:05 -04:00
SIInstrInfo.h
CodeGen: Remove AliasAnalysis from regalloc
2022-07-18 17:23:41 -04:00
SIInstrInfo.td
[AMDGPU] Remove old operand from VOPC DPP
2022-07-19 09:35:05 -04:00
SIInstructions.td
[AMDGPU] Fix bitcast v4i64/v16i16
2022-07-11 22:27:52 +02:00
SIISelLowering.cpp
Use value instead of getValue (NFC)
2022-07-19 21:18:26 -07:00
SIISelLowering.h
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
SILateBranchLowering.cpp
[AMDGPU] Set GFX11 null export target based on export attributes
2022-06-21 09:40:31 +01:00
SILoadStoreOptimizer.cpp
[AMDGPU] Merge flat with global in the SILoadStoreOptimizer
2022-03-09 10:04:37 -08:00
SILowerControlFlow.cpp
[AMDGPU] SILowerControlFlow uses LiveIntervals
2022-07-12 16:53:53 +01:00
SILowerI1Copies.cpp
[AMDGPU] Return better Changed status from SILowerI1Copies
2022-02-17 09:38:57 +00:00
SILowerSGPRSpills.cpp
[NFC] Fix wrong comment.
2022-07-05 13:37:44 +02:00
SIMachineFunctionInfo.cpp
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
SIMachineFunctionInfo.h
[amdgpu] Implement lds kernel id intrinsic
2022-07-19 17:46:19 +01:00
SIMachineScheduler.cpp
[AMDGPU] SIMachineScheduler: Add support for several MachineScheduler features
2022-07-14 09:45:31 +02:00
SIMachineScheduler.h
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
SIMemoryLegalizer.cpp
[llvm] Use value instead of getValue (NFC)
2022-07-13 23:11:56 -07:00
SIModeRegister.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
SIOptimizeExecMasking.cpp
[AMDGPU] Combine s_or_saveexec, s_xor instructions.
2022-07-21 14:16:37 +02:00
SIOptimizeExecMaskingPreRA.cpp
[AMDGPU] Improve liveness copying in si-optimize-exec-masking-pre-ra
2022-07-17 17:34:05 +09:00
SIOptimizeVGPRLiveRange.cpp
AMDGPU: Skip unexpected CFG in SIOptimizeVGPRLiveRange
2022-06-22 12:49:41 +08:00
SIPeepholeSDWA.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIPostRABundler.cpp
[AMDGPU] Fix SIPostRABundler crash on null register used by dbg value
2021-11-18 17:01:19 -08:00
SIPreAllocateWWMRegs.cpp
AMDGPU: Defer creation of WWM VGPR spill slots
2022-04-19 21:07:13 -04:00
SIPreEmitPeephole.cpp
[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
2022-03-16 20:25:42 +08:00
SIProgramInfo.cpp
…
SIProgramInfo.h
[AMDGPU] Add remarks to output some resource usage
2022-07-15 11:01:53 -07:00
SIRegisterInfo.cpp
[NFC][AMDGPU] Cleanup the SIOptimizeExecMasking pass.
2022-07-06 11:03:03 +02:00
SIRegisterInfo.h
[NFC][AMDGPU] Cleanup the SIOptimizeExecMasking pass.
2022-07-06 11:03:03 +02:00
SIRegisterInfo.td
[AMDGPU] Make v16i16/v16f16 legal
2022-06-30 23:08:40 +02:00
SISchedule.td
[AMDGPU] gfx11 subtarget features & early tests
2022-05-11 10:31:49 -04:00
SIShrinkInstructions.cpp
[AMDGPU] GFX11 CodeGen support for MIMG instructions
2022-06-16 18:23:14 +01:00
SIWholeQuadMode.cpp
[AMDGPU] Mark GFX11 dual source blend export as strict-wqm
2022-06-20 21:58:12 +01:00
SMInstructions.td
[AMDGPU][MC][NFC] Refine SMEM load definitions.
2022-07-21 14:56:56 +01:00
SOPInstructions.td
[AMDGPU] New GFX11 intrinsic llvm.amdgcn.s.sendmsg.rtn
2022-06-10 08:15:23 +01:00
VIInstrFormats.td
[AMDGPU] gfx11 export instructions
2022-05-25 14:44:09 -04:00
VINTERPInstructions.td
[AMDGPU] gfx11 VINTERP intrinsics and ISel support
2022-06-17 09:16:59 -04:00
VOP1Instructions.td
[AMDGPU] Support for gfx940 fp8 conversions
2022-07-18 11:48:43 -07:00
VOP2Instructions.td
[AMDGPU] GFX11 trivial NFC tweaks
2022-07-05 17:20:17 +01:00
VOP3Instructions.td
[AMDGPU] Support for gfx940 fp8 conversions
2022-07-18 11:48:43 -07:00
VOP3PInstructions.td
[AMDGPU] Support for gfx940 fp8 smfmac
2022-07-18 12:12:41 -07:00
VOPCInstructions.td
[AMDGPU] Remove old operand from VOPC DPP
2022-07-19 09:35:05 -04:00
VOPDInstructions.td
[AMDGPU] gfx11 VOPD instructions MC support
2022-06-24 11:08:39 -04:00
VOPInstructions.td
[AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op_sel
2022-07-15 13:11:59 +03:00