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clang-p2996/llvm/lib/Target/AMDGPU
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Graham Hunter 1a9195d817 [SVE][MVT] Fixed-length vector MVT ranges 
* Reordered MVT simple types to group scalable vector types
    together.
  * New range functions in MachineValueType.h to only iterate over
    the fixed-length int/fp vector types.
  * Stopped backends which don't support scalable vector types from
    iterating over scalable types.

Reviewers: sdesmalen, greened

Reviewed By: greened

Differential Revision: https://reviews.llvm.org/D66339

llvm-svn: 372099
2019-09-17 10:19:23 +00:00
..
AsmParser
[AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null
2019-09-02 14:19:52 +00:00
Disassembler
[AMDGPU] gfx908 mAI instructions, MC part
2019-07-09 21:43:09 +00:00
MCTargetDesc
[MC] Minor cleanup to MCFixup::Kind handling. NFC.
2019-08-23 01:00:55 +00:00
TargetInfo
Revert CMake: Make most target symbols hidden by default
2019-06-11 03:21:13 +00:00
Utils
Partially revert D61491 "AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0"
2019-09-02 14:40:57 +00:00
AMDGPU.h
[AMDGPU] Printf runtime binding pass
2019-08-12 17:12:29 +00:00
AMDGPU.td
[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
2019-08-23 22:09:58 +00:00
AMDGPUAliasAnalysis.cpp
AMDGPU: Improve alias analysis for GDS
2019-07-17 11:22:19 +00:00
AMDGPUAliasAnalysis.h
…
AMDGPUAlwaysInlinePass.cpp
…
AMDGPUAnnotateKernelFeatures.cpp
AMDGPU: Add intrinsics for address space identification
2019-09-05 02:20:39 +00:00
AMDGPUAnnotateUniformValues.cpp
…
AMDGPUArgumentUsageInfo.cpp
[AMDGPU] Packed thread ids in function call ABI
2019-06-28 01:52:13 +00:00
AMDGPUArgumentUsageInfo.h
AMDGPU: Fix Register copypaste error
2019-09-05 23:07:10 +00:00
AMDGPUAsmPrinter.cpp
[Alignment] Introduce llvm::Align to MCSection
2019-09-13 09:29:59 +00:00
AMDGPUAsmPrinter.h
[AsmPrinter] Remove const qualifier from EmitBasicBlockStart.
2019-08-20 05:13:57 +00:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU] gfx10 atomic optimizer changes.
2019-08-23 10:07:43 +00:00
AMDGPUCallingConv.td
[AMDGPU] Adjust number of SGPRs available in Calling Convention
2019-08-28 15:00:45 +00:00
AMDGPUCallLowering.cpp
AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
2019-09-09 23:06:13 +00:00
AMDGPUCallLowering.h
AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
2019-09-09 23:06:13 +00:00
AMDGPUCodeGenPrepare.cpp
AMDGPU: Preserve value name when inserting mul24 intrinsic
2019-08-24 22:17:10 +00:00
AMDGPUFeatures.td
…
AMDGPUFixFunctionBitcasts.cpp
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
[NFC] Fixed -Wdocumentation warning
2019-08-31 18:44:57 +00:00
AMDGPUGISel.td
AMDGPU/GlobalISel: Select cvt pk intrinsics
2019-09-10 17:17:05 +00:00
AMDGPUHSAMetadataStreamer.cpp
[AMDGPU] Added a new metadata for multi grid sync implicit argument
2019-07-05 16:05:17 +00:00
AMDGPUHSAMetadataStreamer.h
[llvm] Migrate llvm::make_unique to std::make_unique
2019-08-15 15:54:37 +00:00
AMDGPUInline.cpp
[AMDGPU] Tune inlining parameters for AMDGPU target
2019-07-17 16:51:29 +00:00
AMDGPUInstrInfo.cpp
…
AMDGPUInstrInfo.h
…
AMDGPUInstrInfo.td
AMDGPU/GlobalISel: Select cvt pk intrinsics
2019-09-10 17:17:05 +00:00
AMDGPUInstructions.td
AMDGPU/GlobalISel: Select local atomic cmpxchg
2019-08-01 03:41:41 +00:00
AMDGPUInstructionSelector.cpp
AMDGPU/GlobalISel: Fail select of G_INSERT non-32-bit source
2019-09-16 14:26:14 +00:00
AMDGPUInstructionSelector.h
AMDGPU/GlobalISel: Select llvm.amdgcn.class
2019-09-09 18:29:45 +00:00
AMDGPUISelDAGToDAG.cpp
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
2019-08-01 23:27:28 +00:00
AMDGPUISelLowering.cpp
[SVE][MVT] Fixed-length vector MVT ranges
2019-09-17 10:19:23 +00:00
AMDGPUISelLowering.h
AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE
2019-09-09 17:13:44 +00:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Legalize s1 source G_[SU]ITOFP
2019-09-16 00:37:10 +00:00
AMDGPULegalizerInfo.h
AMDGPU/GlobalISel: Legalize G_FMAD
2019-09-13 00:44:35 +00:00
AMDGPULibCalls.cpp
Fix missing use of defined() in include guard
2019-07-12 20:12:15 +00:00
AMDGPULibFunc.cpp
[AMDGPU] Downgrade from StringLiteral to const char* in an attempt to make GCC 5 happy
2019-08-25 12:47:31 +00:00
AMDGPULibFunc.h
…
AMDGPULowerIntrinsics.cpp
…
AMDGPULowerKernelArguments.cpp
AMDGPU: Consolidate some getGeneration checks
2019-06-19 23:54:58 +00:00
AMDGPULowerKernelAttributes.cpp
…
AMDGPUMachineCFGStructurizer.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
AMDGPUMachineFunction.cpp
AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass
2019-07-05 20:26:13 +00:00
AMDGPUMachineFunction.h
…
AMDGPUMachineModuleInfo.cpp
…
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
…
AMDGPUMacroFusion.h
…
AMDGPUMCInstLower.cpp
AMDGPU: Prepare for explicit absolute relocations in code generation
2019-06-16 17:43:37 +00:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
Fix parameter name comments using clang-tidy. NFC.
2019-07-16 04:46:31 +00:00
AMDGPUPerfHintAnalysis.cpp
AMDGPU: Fix assert in clang test
2019-07-05 21:09:53 +00:00
AMDGPUPerfHintAnalysis.h
AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass
2019-07-05 20:26:13 +00:00
AMDGPUPrintfRuntimeBinding.cpp
Change TargetLibraryInfo analysis passes to always require Function
2019-09-07 03:09:36 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPU: Fix iterator crash in AMDGPUPromoteAlloca
2019-06-18 12:23:44 +00:00
AMDGPUPropagateAttributes.cpp
AMDGPU: Move DEBUG_TYPE definition below includes
2019-07-08 18:48:39 +00:00
AMDGPUPTNote.h
…
AMDGPURegisterBankInfo.cpp
AMDGPU/GlobalISel: Fix RegBankSelect for G_FRINT and G_FCEIL
2019-09-16 14:14:37 +00:00
AMDGPURegisterBankInfo.h
AMDGPU/GlobalISel: Add support for wide loads >= 256-bits
2019-07-10 00:22:41 +00:00
AMDGPURegisterBanks.td
GlobalISel/TableGen: Handle setcc patterns
2019-08-29 01:13:41 +00:00
AMDGPURegisterInfo.cpp
[AMDGPU] gfx908 mAI instructions, MC part
2019-07-09 21:43:09 +00:00
AMDGPURegisterInfo.h
…
AMDGPURegisterInfo.td
[AMDGPU] gfx908 register file changes
2019-07-09 19:41:51 +00:00
AMDGPURewriteOutArguments.cpp
…
AMDGPUSearchableTables.td
AMDGPU: add missing llvm.amdgcn.{raw,struct}.buffer.atomic.{inc,dec}
2019-08-05 09:36:06 +00:00
AMDGPUSubtarget.cpp
[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
2019-08-23 22:09:58 +00:00
AMDGPUSubtarget.h
AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR_TRUNC
2019-09-09 17:04:18 +00:00
AMDGPUTargetMachine.cpp
AMDGPU: Run AMDGPUCodeGenPrepare after scalar opts
2019-08-27 00:08:31 +00:00
AMDGPUTargetMachine.h
…
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
AMDGPU: Add intrinsics for address space identification
2019-09-05 02:20:39 +00:00
AMDGPUTargetTransformInfo.h
InferAddressSpaces: Move target intrinsic handling to TTI
2019-08-14 18:13:00 +00:00
AMDGPUUnifyDivergentExitNodes.cpp
Update phis in AMDGPUUnifyDivergentExitNodes
2019-06-25 18:55:16 +00:00
AMDGPUUnifyMetadata.cpp
…
AMDILCFGStructurizer.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
AMDKernelCodeT.h
[AMDGPU] gfx1010 wave32 metadata
2019-06-17 16:48:56 +00:00
BUFInstructions.td
AMDGPU/GlobalISel: Avoid repeating 32-bit type lists
2019-09-06 00:36:10 +00:00
CaymanInstructions.td
…
CMakeLists.txt
[AMDGPU] Printf runtime binding pass
2019-08-12 17:12:29 +00:00
DSInstructions.td
AMDGPU: Remove code address space predicates
2019-09-09 16:02:07 +00:00
EvergreenInstructions.td
AMDGPU: Start redefining atomic PatFrags
2019-08-01 03:25:52 +00:00
FLATInstructions.td
AMDGPU/GlobalISel: Avoid repeating 32-bit type lists
2019-09-06 00:36:10 +00:00
GCNDPPCombine.cpp
[AMDGPU] Fix DPP combiner check for exec modification
2019-07-12 15:59:40 +00:00
GCNHazardRecognizer.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
GCNHazardRecognizer.h
[AMDGPU] gfx908 hazard recognizer
2019-07-11 21:30:34 +00:00
GCNILPSched.cpp
…
GCNIterativeScheduler.cpp
[llvm] Migrate llvm::make_unique to std::make_unique
2019-08-15 15:54:37 +00:00
GCNIterativeScheduler.h
…
GCNMinRegStrategy.cpp
…
GCNNSAReassign.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
GCNProcessors.td
[AMDGPU] gfx908 target
2019-07-09 18:10:06 +00:00
GCNRegBankReassign.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
GCNRegPressure.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
GCNRegPressure.h
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
2019-08-01 23:27:28 +00:00
GCNSchedStrategy.cpp
AMDGPU: Fix typo
2019-09-06 20:00:22 +00:00
GCNSchedStrategy.h
AMDGPU: Avoid constructing new std::vector in initCandidate
2019-09-05 22:44:06 +00:00
LLVMBuild.txt
[AMDGPU] Move InstPrinter files to MCTargetDesc. NFC
2019-05-11 00:03:35 +00:00
MIMGInstructions.td
[AMDGPU] Use PredicateControl in MIMGBaseOpcode. NFC.
2019-08-12 22:32:21 +00:00
R600.td
…
R600AsmPrinter.cpp
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
R600FrameLowering.cpp
…
R600FrameLowering.h
…
R600InstrFormats.td
…
R600InstrInfo.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
R600InstrInfo.h
…
R600Instructions.td
AMDGPU: Redefine load PatFrags
2019-07-16 17:38:50 +00:00
R600ISelLowering.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
R600ISelLowering.h
[TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR42123)
2019-06-12 17:14:03 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
R600MachineScheduler.h
…
R600OpenCLImageTypeLoweringPass.cpp
…
R600OptimizeVectorRegisters.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
R600Packetizer.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
R600Processors.td
…
R600RegisterInfo.cpp
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
2019-08-01 23:27:28 +00:00
R600RegisterInfo.h
CodeGen: Introduce a class for registers
2019-06-24 15:50:29 +00:00
R600RegisterInfo.td
…
R600Schedule.td
…
R700Instructions.td
…
SIAddIMGInit.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
SIAnnotateControlFlow.cpp
[AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32
2019-06-13 23:47:36 +00:00
SIDefines.h
[AMDGPU] gfx10 atomic optimizer changes.
2019-08-23 10:07:43 +00:00
SIFixSGPRCopies.cpp
AMDGPU: Fix bug in r371671 on some builds.
2019-09-12 19:12:21 +00:00
SIFixupVectorISel.cpp
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
2019-08-01 23:27:28 +00:00
SIFixVGPRCopies.cpp
…
SIFoldOperands.cpp
[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
2019-08-23 22:09:58 +00:00
SIFormMemoryClauses.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
SIFrameLowering.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
SIFrameLowering.h
[AMDGPU] Add the adjusted FP as a livein register.
2019-07-16 15:57:12 +00:00
SIInsertSkips.cpp
[AMDGPU] gfx10 conditional registers handling
2019-06-16 17:13:09 +00:00
SIInsertWaitcnts.cpp
[llvm] Migrate llvm::make_unique to std::make_unique
2019-08-15 15:54:37 +00:00
SIInstrFormats.td
[AMDGPU] Extend MIMG opcode to 8 bits
2019-07-12 18:38:06 +00:00
SIInstrInfo.cpp
[AMDGPU]: PHI Elimination hooks added for custom COPY insertion. Fixed
2019-09-17 09:08:58 +00:00
SIInstrInfo.h
[AMDGPU]: PHI Elimination hooks added for custom COPY insertion. Fixed
2019-09-17 09:08:58 +00:00
SIInstrInfo.td
AMDGPU/GlobalISel: Select G_CTPOP
2019-09-13 00:11:20 +00:00
SIInstructions.td
AMDGPU/GlobalISel: Select S16->S32 fptoint
2019-09-16 00:32:56 +00:00
SIISelLowering.cpp
AMDGPU/GlobalISel: Set type on vgpr live in special arguments
2019-09-16 00:33:00 +00:00
SIISelLowering.h
AMDGPU/GlobalISel: First pass at attempting to legalize load/stores
2019-09-10 16:20:14 +00:00
SILoadStoreOptimizer.cpp
[AMDGPU] Enable constant offset promotion to immediate operand for VMEM stores
2019-09-06 15:33:53 +00:00
SILowerControlFlow.cpp
[AMDGPU]: PHI Elimination hooks added for custom COPY insertion. Fixed
2019-09-17 09:08:58 +00:00
SILowerI1Copies.cpp
AMDGPU: Make VReg_1 size be 1
2019-09-09 18:43:29 +00:00
SILowerSGPRSpills.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
SIMachineFunctionInfo.cpp
AMDGPU: Add amdgpu-32bit-address-high-bits to MIR serialization
2019-08-27 18:18:38 +00:00
SIMachineFunctionInfo.h
AMDGPU: Add amdgpu-32bit-address-high-bits to MIR serialization
2019-08-27 18:18:38 +00:00
SIMachineScheduler.cpp
[llvm] Migrate llvm::make_unique to std::make_unique
2019-08-15 15:54:37 +00:00
SIMachineScheduler.h
…
SIMemoryLegalizer.cpp
[llvm] Migrate llvm::make_unique to std::make_unique
2019-08-15 15:54:37 +00:00
SIModeRegister.cpp
[llvm] Migrate llvm::make_unique to std::make_unique
2019-08-15 15:54:37 +00:00
SIOptimizeExecMasking.cpp
Revert "AMDGPU: Fix iterator error when lowering SI_END_CF"
2019-08-20 17:45:25 +00:00
SIOptimizeExecMaskingPreRA.cpp
Revert "AMDGPU: Fix iterator error when lowering SI_END_CF"
2019-08-20 17:45:25 +00:00
SIPeepholeSDWA.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
SIPreAllocateWWMRegs.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
SIProgramInfo.h
[AMDGPU] Fix high occupancy calculation and print it
2019-07-31 01:07:10 +00:00
SIRegisterInfo.cpp
AMDGPU: Inline constant when materalizing FI with add on gfx9
2019-09-12 23:46:46 +00:00
SIRegisterInfo.h
[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
2019-08-23 22:09:58 +00:00
SIRegisterInfo.td
AMDGPU: Make VReg_1 size be 1
2019-09-09 18:43:29 +00:00
SISchedule.td
[AMDGPU] gfx908 scheduling
2019-07-11 21:25:00 +00:00
SIShrinkInstructions.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
SIWholeQuadMode.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
SMInstructions.td
AMDGPU/GlobalISel: Select SMRD loads for more types
2019-09-16 00:54:07 +00:00
SOPInstructions.td
AMDGPU/GlobalISel: Select G_CTPOP
2019-09-13 00:11:20 +00:00
VIInstrFormats.td
…
VIInstructions.td
…
VOP1Instructions.td
AMDGPU/GlobalISel: Select llvm.amdgcn.sffbh
2019-09-10 17:16:59 +00:00
VOP2Instructions.td
AMDGPU/GlobalISel: Select 16-bit VALU bit ops
2019-09-13 03:55:43 +00:00
VOP3Instructions.td
AMDGPU: Move MnemonicAlias out of instruction def hierarchy
2019-09-09 17:25:35 +00:00
VOP3PInstructions.td
[AMDGPU] gfx908 mAI instructions, MC part
2019-07-09 21:43:09 +00:00
VOPCInstructions.td
AMDGPU/GlobalISel: Select llvm.amdgcn.class
2019-09-09 18:29:45 +00:00
VOPInstructions.td
AMDGPU: Move MnemonicAlias out of instruction def hierarchy
2019-09-09 17:25:35 +00:00