746c682c4a
According to the offical LoongArch reference manual, the 32-bit
LoongArch is divied into two variants: the Reduced version (LA32R) and
Standard version (LA32S). LA32S extends LA32R by adding additional
instructions, and the 64-bit version (LA64) fully includes the LA32S
instruction set.
This patch introduces a new target feature `32s` for the LoongArch
backend, enabling support for instructions specific to the LA32S
variant.
The LA32S exntension includes the following additional instructions:
- ALSL.W
- {AND,OR}N
- B{EQ,NE}Z
- BITREV.{4B,W}
- BSTR{INS,PICK}.W
- BYTEPICK.W
- CL{O,Z}.W
- CPUCFG
- CT{O,Z}.W
- EXT.W,{B,H}
- F{LD,ST}X.{D,S}
- MASK{EQ,NE}Z
- PC{ADDI,ALAU12I}
- REVB.2H
- ROTR{I},W
Additionally, LA32R defines three new instruction aliases:
- RDCNTID.W RJ => RDTIMEL.W ZERO, RJ
- RDCNTVH.W RD => RDTIMEH.W RD, ZERO
- RDCNTVL.W RD => RDTIMEL.W RD, ZERO
71 lines
2.6 KiB
LLVM
71 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d --verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=LA32
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; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=LA64
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declare void @callee(ptr, ptr)
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define void @caller(i32 %n) {
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; LA32-LABEL: caller:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $sp, $sp, -64
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; LA32-NEXT: .cfi_def_cfa_offset 64
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; LA32-NEXT: st.w $ra, $sp, 60 # 4-byte Folded Spill
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; LA32-NEXT: st.w $fp, $sp, 56 # 4-byte Folded Spill
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; LA32-NEXT: st.w $s8, $sp, 52 # 4-byte Folded Spill
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; LA32-NEXT: .cfi_offset 1, -4
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; LA32-NEXT: .cfi_offset 22, -8
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; LA32-NEXT: .cfi_offset 31, -12
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; LA32-NEXT: addi.w $fp, $sp, 64
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; LA32-NEXT: .cfi_def_cfa 22, 0
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; LA32-NEXT: bstrins.w $sp, $zero, 5, 0
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; LA32-NEXT: move $s8, $sp
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; LA32-NEXT: addi.w $a0, $a0, 15
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; LA32-NEXT: bstrins.w $a0, $zero, 3, 0
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; LA32-NEXT: sub.w $a0, $sp, $a0
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; LA32-NEXT: move $sp, $a0
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; LA32-NEXT: addi.w $a1, $s8, 0
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; LA32-NEXT: bl callee
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; LA32-NEXT: addi.w $sp, $fp, -64
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; LA32-NEXT: ld.w $s8, $sp, 52 # 4-byte Folded Reload
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; LA32-NEXT: ld.w $fp, $sp, 56 # 4-byte Folded Reload
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; LA32-NEXT: ld.w $ra, $sp, 60 # 4-byte Folded Reload
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; LA32-NEXT: addi.w $sp, $sp, 64
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; LA32-NEXT: ret
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;
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; LA64-LABEL: caller:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $sp, $sp, -64
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; LA64-NEXT: .cfi_def_cfa_offset 64
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; LA64-NEXT: st.d $ra, $sp, 56 # 8-byte Folded Spill
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; LA64-NEXT: st.d $fp, $sp, 48 # 8-byte Folded Spill
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; LA64-NEXT: st.d $s8, $sp, 40 # 8-byte Folded Spill
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; LA64-NEXT: .cfi_offset 1, -8
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; LA64-NEXT: .cfi_offset 22, -16
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; LA64-NEXT: .cfi_offset 31, -24
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; LA64-NEXT: addi.d $fp, $sp, 64
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; LA64-NEXT: .cfi_def_cfa 22, 0
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; LA64-NEXT: bstrins.d $sp, $zero, 5, 0
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; LA64-NEXT: move $s8, $sp
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; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
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; LA64-NEXT: addi.d $a0, $a0, 15
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; LA64-NEXT: bstrpick.d $a0, $a0, 32, 4
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; LA64-NEXT: slli.d $a0, $a0, 4
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; LA64-NEXT: sub.d $a0, $sp, $a0
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; LA64-NEXT: move $sp, $a0
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; LA64-NEXT: addi.d $a1, $s8, 0
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; LA64-NEXT: pcaddu18i $ra, %call36(callee)
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; LA64-NEXT: jirl $ra, $ra, 0
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; LA64-NEXT: addi.d $sp, $fp, -64
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; LA64-NEXT: ld.d $s8, $sp, 40 # 8-byte Folded Reload
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; LA64-NEXT: ld.d $fp, $sp, 48 # 8-byte Folded Reload
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; LA64-NEXT: ld.d $ra, $sp, 56 # 8-byte Folded Reload
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; LA64-NEXT: addi.d $sp, $sp, 64
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; LA64-NEXT: ret
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%1 = alloca i8, i32 %n
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%2 = alloca i32, align 64
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call void @callee(ptr %1, ptr %2)
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ret void
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}
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