Files
clang-p2996/llvm/test/CodeGen/RISCV/shadowcallstack.ll
Paul Kirth ade336d6e1 [codegen][riscv] Emit CFI directives when using shadow call stack
Currently we don't emit any CFI instructions for the SCS register when
enabling SCS on RISCV. This causes problems when unwinding, since the
SCS register isn't being handled properly.

Reviewed By: mcgrathr

Differential Revision: https://reviews.llvm.org/D145205
2023-03-15 17:10:23 +00:00

5.4 KiB