380bb51b70
- Adding the changes from PRs: - #116331 - #121852 - Fixes test `tools/dxil-dis/debug-info.ll` - Address some missed comments in the previous PR --------- Co-authored-by: joaosaffran <joao.saffran@microsoft.com>
99 lines
3.1 KiB
LLVM
99 lines
3.1 KiB
LLVM
; RUN: opt -S -dxil-op-lower -dxil-translate-metadata -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
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; This test make sure LLVM metadata is being translated into DXIL.
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; CHECK: define i32 @test_branch(i32 %X)
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; CHECK-NOT: hlsl.controlflow.hint
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; CHECK: br i1 %cmp, label %if.then, label %if.else, !dx.controlflow.hints [[HINT_BRANCH:![0-9]+]]
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define i32 @test_branch(i32 %X) {
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entry:
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%X.addr = alloca i32, align 4
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%resp = alloca i32, align 4
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store i32 %X, ptr %X.addr, align 4
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%0 = load i32, ptr %X.addr, align 4
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%cmp = icmp sgt i32 %0, 0
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br i1 %cmp, label %if.then, label %if.else, !hlsl.controlflow.hint !0
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if.then: ; preds = %entry
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%1 = load i32, ptr %X.addr, align 4
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%sub = sub nsw i32 0, %1
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store i32 %sub, ptr %resp, align 4
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br label %if.end
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if.else: ; preds = %entry
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%2 = load i32, ptr %X.addr, align 4
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%mul = mul nsw i32 %2, 2
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store i32 %mul, ptr %resp, align 4
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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%3 = load i32, ptr %resp, align 4
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ret i32 %3
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}
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; CHECK: define i32 @test_flatten(i32 %X)
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; CHECK-NOT: hlsl.controlflow.hint
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; CHECK: br i1 %cmp, label %if.then, label %if.else, !dx.controlflow.hints [[HINT_FLATTEN:![0-9]+]]
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define i32 @test_flatten(i32 %X) {
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entry:
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%X.addr = alloca i32, align 4
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%resp = alloca i32, align 4
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store i32 %X, ptr %X.addr, align 4
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%0 = load i32, ptr %X.addr, align 4
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%cmp = icmp sgt i32 %0, 0
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br i1 %cmp, label %if.then, label %if.else, !hlsl.controlflow.hint !1
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if.then: ; preds = %entry
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%1 = load i32, ptr %X.addr, align 4
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%sub = sub nsw i32 0, %1
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store i32 %sub, ptr %resp, align 4
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br label %if.end
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if.else: ; preds = %entry
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%2 = load i32, ptr %X.addr, align 4
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%mul = mul nsw i32 %2, 2
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store i32 %mul, ptr %resp, align 4
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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%3 = load i32, ptr %resp, align 4
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ret i32 %3
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}
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; CHECK: define i32 @test_no_attr(i32 %X)
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; CHECK-NOT: hlsl.controlflow.hint
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; CHECK-NOT: !dx.controlflow.hints
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define i32 @test_no_attr(i32 %X) {
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entry:
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%X.addr = alloca i32, align 4
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%resp = alloca i32, align 4
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store i32 %X, ptr %X.addr, align 4
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%0 = load i32, ptr %X.addr, align 4
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%cmp = icmp sgt i32 %0, 0
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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%1 = load i32, ptr %X.addr, align 4
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%sub = sub nsw i32 0, %1
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store i32 %sub, ptr %resp, align 4
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br label %if.end
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if.else: ; preds = %entry
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%2 = load i32, ptr %X.addr, align 4
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%mul = mul nsw i32 %2, 2
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store i32 %mul, ptr %resp, align 4
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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%3 = load i32, ptr %resp, align 4
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ret i32 %3
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}
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; CHECK-NOT: hlsl.controlflow.hint
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; CHECK: [[HINT_BRANCH]] = !{!"dx.controlflow.hints", i32 1}
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; CHECK: [[HINT_FLATTEN]] = !{!"dx.controlflow.hints", i32 2}
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!0 = !{!"hlsl.controlflow.hint", i32 1}
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!1 = !{!"hlsl.controlflow.hint", i32 2}
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