Matt Arsenault fac9941e57 AMDGPU: Fix ubsan error ...

Since register classes go up to 1024, 32 elements, all masks bits are
needed and a 32-bit shift by 32 is illegal. We didn't have any
instructions theoretically using a 32 element VGPR before
d1dbb5e471

2020-01-23 15:05:47 -05:00

26 KiB

Raw Blame History

View Raw