Jesse Huang 890f8729a2 [RISCV] Use t3 for static chain register when branch CFI is enabled (#142344) ...

Use t3 for static chain register when branch CFI is enabled to align
with gcc.[1]

[1]
https://github.com/gcc-mirror/gcc/blob/master/gcc/config/riscv/riscv.h#L417

2025-06-03 03:13:38 +08:00

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