Files
clang-p2996/llvm/test/CodeGen/RISCV/float-convert.ll
Pengcheng Wang 9122c5235e [RISCV] Enable bidirectional scheduling and tracking register pressure (#115445)
This is based on other targets like PPC/AArch64 and some experiments.

This PR will only enable bidirectional scheduling and tracking register
pressure.

Disclaimer: I haven't tested it on many cores, maybe we should make
some options being features. I believe downstreams must have tried
this before, so feedbacks are welcome.
2024-11-15 17:53:14 +08:00

72 KiB