Justin Bogner aa07f92210 [DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466) ...

Rename HLSL resource-related intrinsics to be consistent with the naming
conventions discussed in [wg-hlsl:0014].

This is an entirely mechanical change, consisting of the following
commands and automated formatting.

```sh
git grep -l handle.fromBinding | xargs perl -pi -e \
  's/(dx|spv)(.)handle.fromBinding/$1$2resource$2handlefrombinding/g'
git grep -l typedBufferLoad_checkbit | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferLoad_checkbit/$1$2resource$2loadchecked$2typedbuffer/g'
git grep -l typedBufferLoad | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferLoad/$1$2resource$2load$2typedbuffer/g'
git grep -l typedBufferStore | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferStore/$1$2resource$2store$2typedbuffer/g'
git grep -l bufferUpdateCounter | xargs perl -pi -e \
  's/(dx|spv)(.)bufferUpdateCounter/$1$2resource$2updatecounter/g'
git grep -l cast_handle | xargs perl -pi -e \
  's/(dx|spv)(.)cast.handle/$1$2resource$2casthandle/g'
```

[wg-hlsl:0014]: https://github.com/llvm/wg-hlsl/blob/main/proposals/0014-consistent-naming-for-dx-intrinsics.md

2024-12-19 12:17:21 -07:00

..

branching

[SPIR-V] Improve general validity of emitted code between passes (#119202)

2024-12-09 21:10:09 +01:00

constant

[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_CHECKS (#119497)

2024-12-11 14:10:00 -08:00

debug-info

[SPIR-V] Improve general validity of emitted code between passes (#119202)

2024-12-09 21:10:09 +01:00

extensions

[SPIR-V] Add saturation and float rounding mode decorations, a subset of arithmetic constrained floating-point intrinsics, and SPV_INTEL_float_controls2 extension (#119862)

2024-12-16 10:29:46 +01:00

function

[SPIR-V] Rework usage of virtual registers' types and classes (#104104)

2024-08-22 09:40:27 +02:00

hlsl-intrinsics

[HLSL] Implement WaveActiveAllTrue Intrinsic (#117245)

2024-12-16 16:13:35 -08:00

hlsl-resources

[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)

2024-12-19 12:17:21 -07:00

image

[SPIR-V] Rework usage of virtual registers' types and classes (#104104)

2024-08-22 09:40:27 +02:00

instructions

[SPIR-V] Add saturation and float rounding mode decorations, a subset of arithmetic constrained floating-point intrinsics, and SPV_INTEL_float_controls2 extension (#119862)

2024-12-16 10:29:46 +01:00

linkage

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00

llvm-intrinsics

[SPIR-V] Add saturation and float rounding mode decorations, a subset of arithmetic constrained floating-point intrinsics, and SPV_INTEL_float_controls2 extension (#119862)

2024-12-16 10:29:46 +01:00

opencl

[SPIR-V] Emit Alignment decoration for alloca instructions and improve type inference (#118520)

2024-12-06 09:59:33 +01:00

optimizations

[clang][llvm][SPIR-V] Explicitly encode native integer widths for SPIR-V (#110695)

2024-11-05 17:26:08 +02:00

passes

[SPIR-V] Allow intrinsics with aggregate return type to reach GlobalISel (#108893)

2024-09-26 10:57:02 +02:00

physical-layout

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pointers

[SPIR-V] Fix emission of debug and annotation instructions and add SPV_EXT_optnone SPIR-V extension (#118402)

2024-12-03 16:18:06 +01:00

SpecConstants

[SPIRV] Improve type inference of operand presented by opaque pointers and aggregate types (#98035)

2024-07-11 07:16:29 +02:00

structurizer

[SPIR-V] Add partial order tests, assert reducible (#117887)

2024-11-28 16:33:01 +01:00

token

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transcoding

[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_CHECKS (#119497)

2024-12-11 14:10:00 -08:00

types

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00

validate

[SPIR-V] Fix generation of invalid SPIR-V in cases of of bitcasts between pointers and multiple null pointers used in the input LLVM IR (#118298)

2024-12-03 16:08:25 +01:00

assume.ll

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AtomicBuiltinsFloat.ll

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AtomicCompareExchange.ll

[SPIRV][RFC] Rework / extend support for memory scopes (#106429)

2024-09-25 00:44:57 +01:00

AtomicExchange.ll

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atomicrmw.ll

[SPIRV][RFC] Rework / extend support for memory scopes (#106429)

2024-09-25 00:44:57 +01:00

basic_float_types.ll

[SPIR-V] Fix BB ordering & register lifetime (#111026)

2024-10-30 14:57:32 +01:00

basic_int_types_spirvdis.ll

[SPIR-V] Re-enable -verify-machineinstrs on tests (#114388)

2024-10-31 13:55:30 +01:00

basic_int_types.ll

[SPIR-V] Re-enable -verify-machineinstrs on tests (#114388)

2024-10-31 13:55:30 +01:00

bitcast.ll

[SPIR-V] Fix emission of debug and annotation instructions and add SPV_EXT_optnone SPIR-V extension (#118402)

2024-12-03 16:18:06 +01:00

block-ordering.ll

[SPIR-V] Sort basic blocks to match the SPIR-V spec (#102929)

2024-08-21 13:08:25 +02:00

builtin_vars-decorate.ll

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capability-Int64Atomics-store.ll

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capability-Int64Atomics.ll

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capability-integers.ll

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capability-kernel.ll

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capability-Shader.ll

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CheckCapKernelWithoutKernel.ll

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ComparePointers.ll

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const-array-in-struct.ll

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const-composite.ll

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const-nested-vecs.ll

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decoration-order.ll

[SPIR-V] Fix OpDecorate emission after vreg def. (#114426)

2024-11-04 13:10:57 +01:00

empty-logical.ll

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empty-module.ll

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empty-opencl32.ll

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empty-opencl64.ll

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empty.ll

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00

EnqueueEmptyKernel.ll

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event_no_group_cap.ll

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event-wait-ptr-type.ll

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event-zero-const.ll

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00

exec_mode_float_control_khr.ll

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execution-mode-per-entry-point.ll

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execution-mode-reqd_work_group_size.ll

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execution-mode-work_group_size_hint.ll

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ExecutionMode_GLCompute.ll

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ExecutionMode.ll

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expect.ll

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00

fence.ll

[SPIRV][RFC] Rework / extend support for memory scopes (#106429)

2024-09-25 00:44:57 +01:00

FOrdGreaterThanEqual_bool.ll

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FOrdGreaterThanEqual_int.ll

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freeze.ll

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half_extension.ll

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half_no_extension.ll

[SPIR-V] Improve general validity of emitted code between passes (#119202)

2024-12-09 21:10:09 +01:00

iaddcarry-builtin.ll

[SPIR-V] Implement builtins for OpIAddCarry/OpISubBorrow and improve/fix type inference (#115192)

2024-11-14 15:30:05 +01:00

image_decl_func_arg.ll

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image_dim.ll

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image-unoptimized.ll

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image.ll

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isubborrow-builtin.ll

[SPIR-V] Implement builtins for OpIAddCarry/OpISubBorrow and improve/fix type inference (#115192)

2024-11-14 15:30:05 +01:00

keep-tracked-const.ll

[SPIR-V] Improve general validity of emitted code between passes (#119202)

2024-12-09 21:10:09 +01:00

linked-list.ll

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lit.local.cfg

[SPIR-V] Enable spirv-sim lit substitution unconditionally (#109451)

2024-09-20 13:00:04 -07:00

literals.ll

[SPIR-V] Re-enable -verify-machineinstrs on tests (#114388)

2024-10-31 13:55:30 +01:00

logical-access-chain.ll

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logical-struct-access.ll

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lshr-constexpr.ll

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00

mangled_function.ll

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memory_model_md.ll

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multi_md.ll

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no_capability_shader.ll

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no-i8-type-duplication.ll

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no-opbitcast-between-identical-types.ll

[SPIR-V] No OpBitcast is generated for a bitcast between identical types (#114877)

2024-11-05 11:25:58 +01:00

opaque_pointers.ll

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opt-gepoperator-of-gvar.ll

[SPIR-V] Address the case when optimization uses GEP operator and GenCode creates G_PTR_ADD to convey the semantics (#107880)

2024-09-11 14:18:14 +02:00

OpVariable_order.ll

[SPIR-V] Fix BB ordering & register lifetime (#111026)

2024-10-30 14:57:32 +01:00

OpVectorInsertDynamic.ll

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phi-insert-point.ll

[SPIR-V] Improve general validity of emitted code between passes (#119202)

2024-12-09 21:10:09 +01:00

phi-ptrcast-dominate.ll

[SPIR-V] Improve general validity of emitted code between passes (#119202)

2024-12-09 21:10:09 +01:00

phi-spvintrinsic-dominate.ll

[SPIR-V] Improve general validity of emitted code between passes (#119202)

2024-12-09 21:10:09 +01:00

preprocess-metadata.ll

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printf.ll

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pstruct.ll

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read_image.ll

[SPIRV] Add reads from image buffer for shaders. (#115178)

2024-11-12 14:04:45 -05:00

relationals.ll

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SampledImageRetType.ll

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00

scoped_atomicrmw.ll

[SPIRV][RFC] Rework / extend support for memory scopes (#106429)

2024-09-25 00:44:57 +01:00

select-builtin.ll

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ShaderBufferImage.ll

[SPIR-V] Re-enable -verify-machineinstrs on tests (#114388)

2024-10-31 13:55:30 +01:00

ShaderImage.ll

[SPIR-V] Re-enable -verify-machineinstrs on tests (#114388)

2024-10-31 13:55:30 +01:00

simple.ll

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sitofp-with-bool.ll

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spec_const_decoration.ll

[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_CHECKS (#119497)

2024-12-11 14:10:00 -08:00

spirv_param_decorations_quals.ll

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spirv_param_decorations.ll

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spirv-decoration.ll

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spirv-load-store.ll

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spirv-tools-dis.ll

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spirv.Queue.ll

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store.ll

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struct.ll

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switch-no-jump-table.ll

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trunc-nonstd-bitwidth.ll

[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_CHECKS (#119497)

2024-12-11 14:10:00 -08:00

TruncToBool.ll

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uitofp-with-bool.ll

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unnamed-global.ll

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00

var-uniform-const.ll

[SPIR-V] Rework usage of virtual registers' types and classes (#101732)

2024-08-12 15:49:43 +02:00