Petar Avramovic 5e0c390160 AMDGPU/GlobalISel: add RegBankLegalize rules for bit shifts and sext-inreg (#132385) ...

Uniform S16 shifts have to be extended to S32 using appropriate Extend
before lowering to S32 instruction.
Uniform packed V2S16 are lowered to SGPR S32 instructions,
other option is to use VALU packed V2S16 and ReadAnyLane.
For uniform S32 and S64 and divergent S16, S32, S64 and V2S16 there are
instructions available.

2025-05-26 12:16:46 +02:00

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