Files
clang-p2996/llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
Iris Shi dae5c4e1e7 [RISCV] Expand constant multiplication for targets without M extension (#137195)
Closes #137023

On RISC-V machines without a native multiply instruction (e.g., `rv32i`
base), multiplying a variable by a constant integer often compiles to a
call to a library routine like `__mul{s,d}i3`.

```assembly
	.globl __mulxi3
	.type  __mulxi3, @function
__mulxi3:
	mv     a2, a0
	mv     a0, zero
.L1:
	andi   a3, a1, 1
	beqz   a3, .L2
	add    a0, a0, a2
.L2:
	srli   a1, a1, 1
	slli   a2, a2, 1
	bnez   a1, .L1
	ret
```

This library function implements multiplication in software using a loop
of shifts and adds, processing the constant bit by bit. On rv32i, it
requires a minimum of 8 instructions (for multiply by `0`) and up to
about 200 instructions (by `0xffffffff`), involves heavy branching and
function call overhead.

When not optimizing for size, we could expand the constant
multiplication into a sequence of shift and add/sub instructions. For
now we use non-adjacent form for the shift and add/sub sequence, which
could save 1/2 - 2/3 instructions compared to a shl+add-only sequence.
2025-05-16 09:40:11 +08:00

2.0 KiB