Tim Northover d0b07e133b AArch64/ARM64: support indexed loads/stores on vector types. ...

While post-indexed LD1/ST1 instructions do exist for vector loads,
this patch makes use of the more flexible addressing-modes in LDR/STR
instructions.

llvm-svn: 207838

2014-05-02 14:54:15 +00:00

22 KiB

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