caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
6bd9ff04afdfbef1cf753f2cdd8a4e85ef6685eb
clang-p2996/llvm/lib/TableGen/Record.cpp
Min-Yih Hsu ecdb549e6d [TableGen] Avoid evaluating RHS of a BinOp until short-circuit is complete (#144021) 
This patch adds an even more aggressive short-circuit on `!and` and
`!or` that completely avoids the evaluation of RHS operand until short
circuiting decisions are made.
2025-06-13 10:36:09 -07:00

106 KiB
Raw Blame History

View Raw
Reference in New Issue View Git Blame Copy Permalink