Files
clang-p2996/llvm/test/CodeGen/AArch64
Simon Wallis a1d83311c8 [AArch64] Change IssueWidth to 5 in AArch64SchedNeoverseN2.td (#145717)
It has been observed that the issue width for neoverse-n2 CPUs is set
too high, and does not properly reflect the dispatch constraints.

I tested various values of IssueWidth (10, 8, 6, 5, 4) with runs of
various workloads on a neoverse-n2 machine and I got the highest overall
geomean score with an issue width of 5.

If this patch were to cause any major regression post-commit, it could
be easily reverted, but it is likely to show an overall improvement.

Related Neoverse-V2 PR: https://github.com/llvm/llvm-project/pull/142565
2025-06-30 17:12:02 +01:00
..
2025-03-30 16:38:16 -07:00

++ SVE CodeGen Warnings ++

When the WARN check lines fail in the SVE codegen tests it most likely means you
have introduced a warning due to:
1. Adding an invalid call to VectorType::getNumElements() or EVT::getVectorNumElements()
   when the type is a scalable vector.
2. Relying upon an implicit cast conversion from TypeSize to uint64_t.

For generic code, please modify your code to work with ElementCount and TypeSize directly.
For target-specific code that only deals with fixed-width vectors, use the fixed-size interfaces.
Please refer to the code where those functions live for more details.