Craig Topper 74a61b02e0 [X86][Disassembler] Clamp index to 4-bits when decoding GPR registers. ...

A 5-bit value can occur when EVEX.X is 0 due to it being used to extend modrm.rm to encode XMM16-31. But if modrm.rm instead encodes a GPR, the Intel documentation says EVEX.X should be ignored so just mask it to 4 bits once we know its a GPR.

llvm-svn: 333725

2018-06-01 05:12:44 +00:00

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