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7653ff398d28851b211e81fa6ab22dd94de16f92
clang-p2996/llvm/test/CodeGen/Thumb2
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Tim Northover a7d90af1be ARM-Darwin: keep the frame register reserved even if not updated. 
Darwin platforms need the frame register to always point at a valid record even
if it's not updated in a leaf function. Backtraces are more important than one
extra GPR.

llvm-svn: 373738
2019-10-04 12:29:32 +00:00
..
LowOverheadLoops
[NFC][ARM][MVE] More tests
2019-10-01 13:02:14 +00:00
2009-07-17-CrossRegClassCopy.ll
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2009-07-21-ISelBug.ll
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2009-07-23-CPIslandBug.ll
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2009-07-30-PEICrash.ll
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2009-08-01-WrongLDRBOpc.ll
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2009-08-02-CoalescerBug.ll
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2009-08-04-CoalescerAssert.ll
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2009-08-04-CoalescerBug.ll
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2009-08-04-ScavengerAssert.ll
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2009-08-04-SubregLoweringBug2.ll
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2009-08-04-SubregLoweringBug3.ll
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2009-08-04-SubregLoweringBug.ll
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2009-08-06-SpDecBug.ll
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2009-08-07-CoalescerBug.ll
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2009-08-07-NeonFPBug.ll
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2009-08-08-ScavengerAssert.ll
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2009-08-10-ISelBug.ll
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2009-08-21-PostRAKill4.ll
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2009-09-01-PostRAProlog.ll
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2009-10-15-ITBlockBranch.ll
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2009-11-01-CopyReg2RegBug.ll
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2009-11-11-ScavengerAssert.ll
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2009-11-13-STRDBug.ll
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2009-12-01-LoopIVUsers.ll
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2010-01-06-TailDuplicateLabels.ll
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2010-01-19-RemovePredicates.ll
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2010-02-11-phi-cycle.ll
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2010-02-24-BigStack.ll
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2010-03-08-addi12-ccout.ll
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2010-03-15-AsmCCClobber.ll
ARM-Darwin: keep the frame register reserved even if not updated.
2019-10-04 12:29:32 +00:00
2010-04-15-DynAllocBug.ll
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2010-04-26-CopyRegCrash.ll
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2010-05-24-rsbs.ll
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2010-06-14-NEONCoalescer.ll
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2010-06-19-ITBlockCrash.ll
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2010-06-21-TailMergeBug.ll
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2010-08-10-VarSizedAllocaBug.ll
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2010-11-22-EpilogueBug.ll
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2010-12-03-AddSPNarrowing.ll
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2011-04-21-FILoweringBug.ll
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2011-06-07-TwoAddrEarlyClobber.ll
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2011-12-16-T2SizeReduceAssert.ll
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2012-01-13-CBNZBug.ll
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2013-02-19-tail-call-register-hint.ll
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2013-03-02-vduplane-nonconstant-source-index.ll
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2013-03-06-vector-sext-operand-scalarize.ll
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aapcs.ll
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aligned-constants.ll
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aligned-spill.ll
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bfi.ll
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bfx.ll
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bicbfi.ll
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buildvector-crash.ll
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carry.ll
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cbnz.ll
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cmp-frame.ll
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constant-hoisting.ll
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constant-islands-cbz.ll
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constant-islands-cbz.mir
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constant-islands-jump-table.ll
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constant-islands-new-island-padding.ll
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constant-islands-new-island.ll
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constant-islands.ll
[ARM] Fix for buildbots
2019-09-17 14:21:36 +00:00
cortex-fp.ll
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crash.ll
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cross-rc-coalescing-1.ll
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cross-rc-coalescing-2.ll
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csel.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
div.ll
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emit-unwinding.ll
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float-cmp.ll
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float-intrinsics-double.ll
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float-intrinsics-float.ll
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float-ops.ll
[ARM] Split large truncating MVE stores
2019-09-24 10:10:41 +00:00
fp16-stacksplot.mir
[ARM] Reserve an emergency spill slot for fp16 addressing modes that need it
2019-09-17 15:23:09 +00:00
frame-pointer.ll
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frameless2.ll
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frameless.ll
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high-reg-spill.mir
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ifcvt-cbz.mir
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ifcvt-compare.ll
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ifcvt-minsize.ll
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ifcvt-neon-deprecated.mir
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ifcvt-no-branch-predictor.ll
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ifcvt-rescan-bug-2016-08-22.ll
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ifcvt-rescan-diamonds.ll
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inflate-regs.ll
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inline-asm-i-constraint-i1.ll
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inlineasm-error-t-toofewregs-mve.ll
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inlineasm-mve.ll
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inlineasm.ll
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intrinsics-cc.ll
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intrinsics-coprocessor.ll
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large-call.ll
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large-stack.ll
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ldr-str-imm12.ll
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lit.local.cfg
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longMACt.ll
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lsll0.ll
[ARM] Ensure we do not attempt to create lsll #0
2019-09-25 10:16:48 +00:00
lsr-deficiency.ll
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m4-sched-ldr.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
m4-sched-regs.ll
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machine-licm.ll
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mul_const.ll
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mve-abs.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
mve-basic.ll
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mve-be.ll
[ARM] MVE big endian loads/stores
2019-08-08 15:15:19 +00:00
mve-bitarith.ll
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mve-bitcasts.ll
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mve-bitreverse.ll
[ARM] Add patterns for bitreverse intrinsic on MVE
2019-09-16 15:20:03 +00:00
mve-bswap.ll
[ARM] Add patterns for BSWAP intrinsic on MVE
2019-09-16 15:20:10 +00:00
mve-ctlz.ll
[ARM] Add patterns for CTLZ on MVE
2019-09-16 15:19:49 +00:00
mve-ctpop.ll
[ARM] Expand CTPOP intrinsic for MVE
2019-08-07 15:47:45 +00:00
mve-cttz.ll
[ARM] Fix CTTZ not generating correct instructions MVE
2019-09-20 15:03:44 +00:00
mve-div-expand.ll
[MVE] VMOVX patterns
2019-08-28 10:13:23 +00:00
mve-fmas.ll
[MVE] VMOVX patterns
2019-08-28 10:13:23 +00:00
mve-fmath.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
mve-fp-negabs.ll
[MVE] VMOVX patterns
2019-08-28 10:13:23 +00:00
mve-frint.ll
[MVE] VMOVX patterns
2019-08-28 10:13:23 +00:00
mve-ldst-offset.ll
[ARM] Fix MVE ldst offset ranges
2019-09-03 09:57:02 +00:00
mve-ldst-postinc.ll
[ARM] More MVE load/store tests for offsets around the negative limit. NFC
2019-09-03 09:42:16 +00:00
mve-ldst-preinc.ll
[ARM] More MVE load/store tests for offsets around the negative limit. NFC
2019-09-03 09:42:16 +00:00
mve-ldst-regimm.ll
[ARM] Add support for MVE pre and post inc loads and stores
2019-08-08 15:27:58 +00:00
mve-loadstore.ll
[ARM] Fix MVE ldst offset ranges
2019-09-03 09:57:02 +00:00
mve-masked-ldst.ll
[ARM] A predicate cast of a predicate cast is a predicate cast
2019-09-16 17:29:07 +00:00
mve-masked-load.ll
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-masked-store.ll
[ARM] Split large truncating MVE stores
2019-09-24 10:10:41 +00:00
mve-minmax.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
mve-neg.ll
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mve-nofloat.ll
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mve-phireg.ll
[ARM] Use MQPR not QPR for MVE registers
2019-09-02 17:18:23 +00:00
mve-pred-and.ll
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-pred-bitcast.ll
[ARM] A predicate cast of a predicate cast is a predicate cast
2019-09-16 17:29:07 +00:00
mve-pred-build-const.ll
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mve-pred-build-var.ll
[ARM] MVE i1 splat
2019-09-19 12:17:41 +00:00
mve-pred-ext.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
mve-pred-loadstore.ll
[ARM] A predicate cast of a predicate cast is a predicate cast
2019-09-16 17:29:07 +00:00
mve-pred-not.ll
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-pred-or.ll
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-pred-shuffle.ll
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mve-pred-spill.ll
[ARM] MVE big endian loads/stores
2019-08-08 15:15:19 +00:00
mve-pred-xor.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
mve-sext.ll
[ARM] MVE sext and widen/narrow tests from larger types. NFC
2019-09-24 10:39:58 +00:00
mve-shifts.ll
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mve-shuffle.ll
[MVE] VMOVX patterns
2019-08-28 10:13:23 +00:00
mve-shuffleext.ll
[ARM] Identity shuffles are legal
2019-10-02 11:40:51 +00:00
mve-simple-arith.ll
[MVE] VMOVX patterns
2019-08-28 10:13:23 +00:00
mve-soft-float-abi.ll
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mve-stack.ll
[ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores
2019-09-17 15:32:28 +00:00
mve-stacksplot.mir
[ARM] Fix for MVE load/store stack accesses
2019-09-17 12:58:51 +00:00
mve-vaddqr.ll
[ARM] Add patterns for VADD with q and r registers
2019-09-06 17:02:35 +00:00
mve-vaddv.ll
Reapply: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32
2019-08-22 10:29:20 +00:00
mve-vcmp.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
mve-vcmpf.ll
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vcmpfr.ll
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vcmpfz.ll
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vcmpr.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
mve-vcmpz.ll
[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands
2019-09-03 11:30:54 +00:00
mve-vctp.ll
[ARM][MVE] Remove old tail predicates
2019-09-23 09:48:25 +00:00
mve-vcvt.ll
[MVE] VMOVX patterns
2019-08-28 10:13:23 +00:00
mve-vdup.ll
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mve-vector-spill.ll
[ARM] MVE spill vector test. NFC
2019-08-11 09:12:57 +00:00
mve-vfma.ll
[MVE] VMOVX patterns
2019-08-28 10:13:23 +00:00
mve-vhaddsub.ll
[ARM] Generate MVE VHADDs/VHSUBs
2019-08-07 10:26:57 +00:00
mve-vmaxv.ll
[ARM] Simplify and update vmla test. NFC
2019-09-15 11:53:05 +00:00
mve-vmla.ll
[ARM] Simplify and update vmla test. NFC
2019-09-15 11:53:05 +00:00
mve-vmovimm.ll
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mve-vmulqr.ll
[ARM] Add patterns for VMUL with q and r registers
2019-09-06 17:02:21 +00:00
mve-vmvnimm.ll
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mve-vpsel.ll
[ARM] MVE predicate bitcast test and VPSEL adjustment. NFC
2019-09-02 19:03:35 +00:00
mve-vpt-block2.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vpt-block3.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vpt-block4.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vpt-block5.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vpt-block6.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vpt-block7.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vpt-block8.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vpt-block.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vpt-nots.mir
[ARM] Fold VCMP into VPT
2019-09-16 13:02:41 +00:00
mve-vsubqr.ll
[ARM] Add patterns for VSUB with q and r registers
2019-09-06 17:02:42 +00:00
mve-widen-narrow.ll
[ARM] Split large widening MVE loads
2019-09-24 10:53:09 +00:00
peephole-addsub.mir
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peephole-cmp.mir
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pic-load.ll
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segmented-stacks.ll
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setjmp_longjmp.ll
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stack_guard_remat.ll
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t2-teq-reduce.mir
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t2sizereduction.mir
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tail-call-r9.ll
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tbb-removeadd.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
thumb2-adc.ll
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thumb2-add2.ll
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thumb2-add3.ll
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thumb2-add4.ll
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thumb2-add5.ll
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thumb2-add6.ll
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thumb2-add.ll
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thumb2-and2.ll
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thumb2-and.ll
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thumb2-asr2.ll
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thumb2-asr.ll
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thumb2-bcc.ll
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thumb2-bfc.ll
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thumb2-bic.ll
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thumb2-branch.ll
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thumb2-call-tc.ll
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thumb2-call.ll
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thumb2-cbnz.ll
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thumb2-clz.ll
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thumb2-cmn2.ll
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thumb2-cmn.ll
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thumb2-cmp.ll
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thumb2-cpsr-liveness.ll
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thumb2-eor2.ll
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thumb2-eor.ll
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thumb2-ifcvt1-tc.ll
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thumb2-ifcvt1.ll
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thumb2-ifcvt2.ll
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thumb2-ifcvt3.ll
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thumb2-jtb.ll
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thumb2-ldm.ll
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thumb2-ldr_ext.ll
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thumb2-ldr_post.ll
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thumb2-ldr_pre.ll
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thumb2-ldr.ll
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thumb2-ldrb.ll
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thumb2-ldrd.ll
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thumb2-ldrh.ll
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thumb2-lsl2.ll
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thumb2-lsl.ll
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thumb2-lsr2.ll
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thumb2-lsr3.ll
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thumb2-lsr.ll
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thumb2-mla.ll
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thumb2-mls.ll
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thumb2-mov.ll
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thumb2-mul.ll
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thumb2-mulhi.ll
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thumb2-mvn2.ll
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thumb2-mvn.ll
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thumb2-neg.ll
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thumb2-orn2.ll
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thumb2-orn.ll
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thumb2-orr2.ll
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thumb2-orr.ll
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thumb2-pack.ll
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thumb2-rev16.ll
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thumb2-rev.ll
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thumb2-ror.ll
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thumb2-rsb2.ll
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thumb2-rsb.ll
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thumb2-sbc.ll
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thumb2-select_xform.ll
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thumb2-select.ll
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thumb2-shifter.ll
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thumb2-smla.ll
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thumb2-smul.ll
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thumb2-spill-q.ll
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thumb2-str_post.ll
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thumb2-str_pre.ll
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thumb2-str.ll
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thumb2-strb.ll
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thumb2-strh.ll
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thumb2-sub2.ll
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thumb2-sub3.ll
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thumb2-sub4.ll
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thumb2-sub5.ll
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thumb2-sub.ll
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thumb2-sxt_rot.ll
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thumb2-sxt-uxt.ll
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thumb2-tbb.ll
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thumb2-tbh.ll
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thumb2-teq2.ll
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thumb2-teq.ll
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thumb2-tst2.ll
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thumb2-tst.ll
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thumb2-uxt_rot.ll
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thumb2-uxtb.ll
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tls1.ll
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tls2.ll
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tpsoft.ll
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umulo-64-legalisation-lowering.ll
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umulo-128-legalisation-lowering.ll
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unreachable-large-offset-gep.ll
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v8_deprecate_IT.ll
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v8_IT_1.ll
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v8_IT_2.ll
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v8_IT_3.ll
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v8_IT_4.ll
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v8_IT_5.ll
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v8_IT_6.ll
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