Files
clang-p2996/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
David Majnemer 45951a6626 [InstCombine] (mul nsw 1, INT_MIN) != (shl nsw 1, 31)
Multiplying INT_MIN by 1 doesn't trigger nsw.  However, shifting 1 into
the sign bit *does* trigger nsw.

llvm-svn: 235250
2015-04-18 04:41:30 +00:00

51 KiB